Static information storage and retrieval – Read/write circuit – Erase
Patent
1989-07-19
1991-07-02
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Erase
365185, 3652385, G11C 1140
Patent
active
050291394
ABSTRACT:
An EEPROM circuit having a word-erase capability is disclosed using buried bit line fabrication techniques. The word-erasable EEPROM uses minimum additional chip area and minimum fabrication process modification.
REFERENCES:
patent: 4408306 (1983-10-01), Kuo
Brady III W. James
Comfort James T.
Fears Terrell W.
Sharp Melvin
Texas Instruments Incorporated
LandOfFree
Word erasable buried bit line EEPROM does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Word erasable buried bit line EEPROM, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Word erasable buried bit line EEPROM will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1253009