Wiring structure of a semiconductor device and method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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Details

C257S750000, C257S751000, C257S755000, C438S657000

Reexamination Certificate

active

07573132

ABSTRACT:
A wiring structure of a semiconductor device may have an insulation layer, a spacer and a plug. The insulation layer may be provided on a substrate and may have an opening through which a contact region of the substrate is exposed. The spacer may be provided on a sidewall of the opening. The plug may fill the opening and may include a polysilicon pattern doped with impurities, a metal silicide pattern, and a metal pattern sequentially provided on the substrate.

REFERENCES:
patent: 4641420 (1987-02-01), Lee
patent: 5306952 (1994-04-01), Matsuura et al.
patent: 6271125 (2001-08-01), Yoo et al.
patent: 6455424 (2002-09-01), McTeer et al.
patent: 6545360 (2003-04-01), Ohkubo et al.
patent: 7074717 (2006-07-01), Rhodes
patent: 2002-203810 (2002-07-01), None
patent: 10-2002-0002086 (2002-01-01), None
patent: 10-321738 (2002-01-01), None

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