Wiring structure and wiring designing method

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S669000, C438S468000, C438S957000, C438S761000, C257S774000, C257S208000, C257S773000

Reexamination Certificate

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07935630

ABSTRACT:
A designing method of a semiconductor device having a first wire and a second wire with a plurality of vias includes determining a first life time change rate of the semiconductor device in response to a change in a number of via column, a second life time change rate of the semiconductor device in response to a change in a number of via row, reducing the number of via column according to a ratio based on the first life time change and the second life time change; and increasing the number of via row at least one.

REFERENCES:
patent: 6989597 (2006-01-01), Fujino et al.
patent: 2006/0163737 (2006-07-01), Goller et al.
patent: 1856877 (2006-11-01), None
patent: 3-42856 (1991-02-01), None
patent: 2004-158846 (2004-06-01), None
Chinese Office Action dated Dec. 6, 2010, issued in corresponding Chinese Patent Application No. 200910179459.1.

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