Wiring pattern determination method and computer program...

Details Wiring pattern determination method and computer program... Wiring pattern determination method and computer program...

2006-09-25

2009-10-20

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07607113

ABSTRACT:
A wiring pattern determination method and a computer program thereof comprise a step of moving positions of tentatively designed plated leads on an edge of a semiconductor package to the positions that can be accommodated in positionable windows nearest to the respective tentatively designed plated lead positions, in a template in which the positionable windows are arranged, so that the positionable windows have a predetermined pitch in a row direction corresponding to an identical layer of a multi-layered structure and so that the positionable windows are positioned at least in every other row in a column direction corresponding to a lamination direction of the multi-layered structure and, then, determining the moved positions as optimal positions of the plated leads.

REFERENCES:
patent: 6596549 (2003-07-01), Kitamura et al.
patent: 2005/0050505 (2005-03-01), Bednar et al.
patent: 2002-083006 (2002-03-01), None
patent: 2002-149734 (2002-05-01), None

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