Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-10-10
2006-10-10
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
07120881
ABSTRACT:
An edge extraction unit extracts vertical and horizontal wiring edges and slanted wiring edges from overall wiring graphics, and a wiring width classification unit executes a scaling process for the overall wiring graphics to classify the wiring graphics into wiring width ranges which are divided by a predefined reference wiring width. A vertical and horizontal wiring edge extraction unit extracts the vertical and horizontal wiring edges which are in contact with graphics classified into the wiring width ranges, and a vertical and horizontal wiring interval verification unit verifies intervals between the vertical and horizontal wiring edges and opposed edges to be verification counterparts based on a vertical and horizontal reference interval for each wiring width range. A slanted wiring edge extraction unit extracts slanted wiring edges which are in contact with graphics classified into the wiring width ranges, and a slanted wiring interval verification unit verifies intervals between the slanted wiring edges and opposed edges to be verification counterparts based on a slanted reference interval for each wiring width range.
REFERENCES:
patent: 6427225 (2002-07-01), Kitada et al.
patent: 6941531 (2005-09-01), Teig et al.
patent: 2002/0049957 (2002-04-01), Hosono et al.
patent: 2004/0205683 (2004-10-01), Kovacs-Birkas et al.
patent: 2006/0080634 (2006-04-01), Beale
patent: 8-55140 (1993-02-01), None
patent: 11-96200 (1999-04-01), None
patent: 2001-13673 (2001-01-01), None
Kodama Chikaaki
Yoshitake Akiihiro
Dinh Paul
Fujitsu Limited
Parihar Suchin
Staas & Halsey , LLP
LandOfFree
Wiring graphic verification method, program and apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Wiring graphic verification method, program and apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wiring graphic verification method, program and apparatus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3699931