Wiring glass substrate for connecting a semiconductor chip...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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Details

C257S698000, C257S100000

Reexamination Certificate

active

10483175

ABSTRACT:
A wiring glass substrate includes a glass substrate formed of glass and having a plurality of holes formed at predetermined positions, bumps so formed as to be connected to a conductive material filling the holes and wirings formed on a surface opposite to a surface having the bumps formed thereon and electrically connecting a plurality of connection terminals arranged in intervals different from intervals of the holes to the conductive material. The shape of the conductive material is porous and porous electrodes are bonded to the inner wall surfaces of the holes by an anchor effect to increase the strength of the glass substrate.

REFERENCES:
patent: 6586686 (2003-07-01), Enomoto et al.
patent: 8-18181 (1996-01-01), None
patent: 9-17828 (1997-01-01), None
patent: 90 17828 (1997-01-01), None
patent: 9147625 (1997-06-01), None
patent: 9-321184 (1997-12-01), None
patent: 10-284836 (1998-10-01), None
patent: 11-177234 (1999-07-01), None
patent: 11-186681 (1999-07-01), None
patent: 2001-189550 (2001-07-01), None
patent: WO 00/36886 (2000-06-01), None

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