Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-06-01
2003-10-14
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C438S675000, C438S623000, C438S622000, C438S625000
Reexamination Certificate
active
06634013
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally relates to wiring failure analysis methods using simulation of electromigration that analyze wiring failures causing shape variations of wires by effecting current and heat transfer analysis and analysis of diffusion of atoms in crystal grain structures. Specifically, this invention relates to void shape analysis methods that analyze shapes of voids growing in areas that are smallest in variations of chemical potentials due to generation or development of voids per unit volume when vacancy concentrations exceed critical values.
2. Description of the Related Art
Japanese Patent Unexamined Publication No. Hei 7-283283 discloses an example of the conventional wiring failure analysis method that effects numerical analysis for wiring failures based on electromigration (EM) by combination of potential analysis and analysis of diffusion of grain boundaries. This method is designed to realize more precise analysis by reproducing phenomena which are very close to the actual phenomena. Operations and steps of this method will be described below.
(Step 1) To create crystal grain structures in accordance with shapes of wires.
(Step 2) To obtain current density distribution based on the finite element method.
(Step 3) To obtain temperature distribution based on the finite element method by using a heat source of Joule heat, which is generated in response to currents caused by using common meshes.
(Step 4) To calculate diffusion values of atoms on a network of grain boundaries being formed.
(Step 5) To perform prescribed processes based on assumption that voids and hillocks are generated when excess or deficiency is caused in balance of atoms at triple points respectively.
(Step 6) To repeat the aforementioned steps 1 to 5 until disconnection occurs in wiring due to growth of the voids or until it is regarded that fusion or melting occur in wiring when a part of the wiring is increased in temperature to reach the melting point.
FIG. 7
shows a cross section of a wire being magnified, which is formed by the conventional method.
FIG. 8
shows a part of grain boundaries being magnified, which are formed inside of the wire. In the network of grain boundaries shown in
FIG. 8
, three grain boundaries cross with each other at a triple point (P
1
) or the like. It is well known that voids are easily generated at such a triple point.
As for failure determination, the conventional method uses increases of resistance at areas corresponding to the triple points and the like in which divergence occurs on atom fluxes.
It is noted again that the conventional wiring failure analysis method makes failure determination by detecting increases of resistance at the prescribed areas such as the triple points in which divergence occurs on atom fluxes. For this reason, the conventional method is inapplicable to reservoir portions of aluminum alloy wiring coupled with tungsten (W) plugs.
Due to development of fine structures for large scale integrated circuits (or LSI circuits), tungsten plugs are frequently used to cope with increases of aspect ratios of contact holes. If the tungsten is used for the aluminum wiring, aluminum atoms cannot be transmitted through the plugs, which in turn act as current paths. Although electric currents flow through the plugs, the aluminum atoms are stopped by the plugs. So, there is a problem in which electromigration defects are caused to occur at the plugs, which correspond to divergence points for the electromigration. A monograph entitled “Reservoir length dependence of EM lifetime for tungsten via chains under low current stress”, which is written by M. Fujii, K. Koyama and J. Aoyama for VMIC Conference 312 (1996), proposes a solution to the aforementioned problem. That is, wires are extended in a direction opposite to the direction of currents to provide reservoir portions, by which supply sources of aluminum atoms are located to expand the lifetime of wires.
Because, atom drift due to the electromigration is extremely small at end portions of the reservoir portions that have low current densities. Therefore, it is possible to presume that divergence of atom fluxes are hardly caused to occur due to the atom drift that is one cause in occurrence of divergence of atom fluxes.
Originally, areas having high vacancy concentrations emerge just above the plugs, while the reservoir portions have low vacancy concentrations. Due to the gradient of concentrations that is another cause in occurrence of divergence of atom fluxes, vacancies are diffused so that the reservoir portions are increased in vacancy concentration. However, atom fluxes are caused to occur in the direction for actualizing uniformity of vacancy concentration, so the atom fluxes do not diverge. In other words, concentration distribution is changed to eliminate the concentration gradient before occurrence of divergence of the atom fluxes. Studying two types of the causes in the occurrence of divergence of the atom fluxes, it can be said that the divergence of the atom fluxes may not occur in the reservoir portions.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a wiring failure analysis method that analyzes wiring failures causing shape variations of wires by current and heat transfer analysis and analysis of diffusion of atoms in crystal grain structures and that is applicable to analysis of shapes of voids with respect to reservoir portions of aluminum alloy wiring coupled with tungsten plugs.
Basically this invention actualizes a wiring failure analysis method that performs simulation of wiring failure analysis using electromigration on the basis of the potential analysis and analysis of diffusion of atoms at grain boundaries of crystal grain structures. A first aspect of this invention is to perform a specific process on generation of voids based on magnitude of chemical potentials. A second aspect of this invention is to calculate chemical potentials before and after generation of virtual voids around nodes being obtained from mesh information of wiring. A third aspect of this invention corresponds to details of calculation of the chemical potentials, in which gradients are calculated with respect to the chemical potentials being produced by surface energy. A fourth aspect of this invention is to realize growth of voids in areas in which variations of chemical potentials due to generation of voids in unit volume are smallest when vacancy concentration exceeds the critical value. A fifth aspect of this invention is application of the wiring failure analysis specifically to LSI circuits having reservoir portions that are formed at end portions of wires. A sixth aspect of this invention is application of the wiring failure analysis specifically to LSI circuits in which wires are made of aluminum alloy while plugs are made of tungsten.
FIGS. 9 and 10
show an example of a via structure of wires that is configured by an upper layer wire
41
, a lower layer wire
42
and a via plug
43
. That is, the via structure of wires is created as shown in
FIGS. 9 and 10
, and then the finite element method is applied to solve the background field (e.g., temperature, current density) to provide electron wind power proportional to the current density and diffusion coefficients with respect to parameters of crystal structures such as the crystal lattice, grain boundary, interface and surface. Thus, vacancy concentration is calculated by performing diffusion analysis using the electron wind power and diffusion coefficients. If the hole concentration exceeds the critical value with respect to the grain boundary and interface, micro voids are virtually generated around nodes respectively, so chemical potentials are calculated before and after generation of the micro voids. Then, voids are actually generated around the node at which variations of chemical potentials being calculated is smallest.
Incidentally, the reservoir portion corresponds to a right side of a wire shown in
FIG. 6
, and it also corresponds to a right side viewed f
Choate Hall & Stewart
Dimyan Magid Y
NEC Electronics Corporation
Smith Matthew
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