Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-11-18
2010-11-30
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C326S031000, C326S041000, C326S047000, C326S101000
Reexamination Certificate
active
07844935
ABSTRACT:
A wiring design system for semiconductor integrated circuit which realizes a low power consumption in a grid-shaped clock wiring within a semiconductor integrated circuit is provided. A wiring design system10for semiconductor integrated circuit which designs the gird-shaped clock wiring for uniformly distributing the clock signals to the flip flop circuits arranged within the semiconductor integrated circuit, wherein, of the clock wiring lines forming the grid-shaped clock wiring, a clock wiring line having a smaller effect on the distribution operation of the clock signals in the grid-shaped clock wiring is selected and thinned out as a less necessary clock wiring line.
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patent: 2003-282712 (2003-10-01), None
Kik Phallaka
NEC Corporation
Scully , Scott, Murphy & Presser, P.C.
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