Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1999-04-02
2001-09-25
Teska, Kevin J. (Department: 2123)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C703S002000
Reexamination Certificate
active
06295634
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a wiring design apparatus, wiring determination apparatus and methods thereof for designing an optimum wiring routine between bonding pads provided on a semiconductor chip and pins (terminals) provided on a semiconductor package.
BACKGROUND OF THE INVENTION
A wiring design apparatus which automatically or semi-automatically designs a wiring of a printed circuit substrate or a wiring between bonding pads of a semiconductor chip and pins (terminals) of a semiconductor package which is used in a electronic equipment is disclosed in PUPA 5-143689. An improvement of wiring route and design speed has been disclosed, however, it is not determined until the wiring design has been completed whether or not wiring of a printed circuit and the like is 100% possible (whether or not a wiring solution exists) in the prior art wiring design apparatus.
In designing wiring in a specific area such as a wiring of a semiconductor package, an illegal wiring in which the wire density among the pins is unnecessarily dense and the route detours excessively, or turns round the periphery of pins has to be detected and corrected even if there is a wiring solution.
However, prior to this invention it was not possible to detect such illegal wiring until the wiring design had been completed in the prior art wiring design apparatus.
When the prior art wiring design apparatus was used, additional work for correcting information of the subject of wiring (design information) included disposition of parts on a printed circuit substrate or disposition of bonding pads of a semiconductor chip and pins of a semiconductor package, work on wiring design and work of detecting and correcting an illegal wiring have to be repeated again and again until a wiring solution is obtained and all the wires follow an optimum route.
Such repetition of work took a very long time and it is a heavy burden on the designer.
On the other hand, “Algorithm C++” by Robert Sedwick published by Kindai-Kagaku Co., pages 461-; (original publication “Algorithm in C++”, 1990, Addison Wesley Co.., Inc., MA, USA) discloses Volonoi polygon method and Delaunay triangulation method (they are essentially the same though differently named) as a method of solving a problem relating to a distance between an arbitrary point on a plane and multiple points (mother points) given on the same plane. No wiring determination apparatus has ever existed so far which uses Delaunay triangulation method in wiring design to quickly determine presence or absence of wiring solution for detecting and correcting an illegal wiring.
PURPOSES AND SUMMARY OF THE INVENTION
This invention is conceived in view of the above described problems of the prior art and aims at provision of a wiring design apparatus, a wiring determination apparatus and methods thereof which can quickly determine whether or not wiring is 100% possible (whether or not there is a wiring solution) in wiring a printed circuit substrate and the like before the wiring design has been totally completed.
Therefore, one purpose of this invention is to provide a wiring design apparatus, a wiring determination apparatus and methods thereof which can detect and correct an illegal wiring in which the route detours excessively, or turns round the periphery of pins before the wiring design has been totally completed in designing wiring in a specific area such as a wiring of a semiconductor package.
Another purpose of this invention is to provide a wiring design apparatus, a wiring determination apparatus and methods thereof which can efficiently obtain a wiring solution in wiring design to allow an illegal wiring to be detected and corrected for largely decreasing the burden on the designer.
Still another purpose of this invention is to provide a wiring design apparatus, a wiring determination apparatus and methods thereof which can quickly and efficiently obtain an optimum wiring solution utilizing the Delaunay triangulation method in wiring design.
REFERENCES:
Su et al.; “Post-route optimization for improved yield using a rubber-band wiring model”; IEEE/ACM Int. Conf. Comp. Aided Design; pp. 700-706, Nov. 1997.*
Yu et al.; “Interchangeable pin routing with application to package layout”; IEEE/ACM Int. Conf. CAD; pp. 668-673, Nov. 1996.*
Ellis et al.; “A hierarchical decomposition methodology for multistage clock circuits”; IEEE/ACM Int. Conf. CAD; pp. 266-273, Nov. 1997.*
Lee et al.; “On Steiner tree problem with 45/spl deg/ routing”; IEEE ISCAS '95; pp. 1680-1682, Apr. 1995.*
Lu et al.; “A numerical stable algorithm for constructing constrained Delaunay triangulation and application to multicjip module layout”; IEEE Int. Conf. Circuits & Sys.; pp. 644-647, Jun. 1991.*
Dai: “Performance driven layout of thin-film substrates for multichip layouts”; IEEE Int. Symp. Circuits & Sys.; pp. 2308-2311, Jun. 1991.
International Business Machines - Corporation
Jones Hugh
Pepper Margaret A.
Teska Kevin J.
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