Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1998-12-15
2001-08-07
Gaffin, Jeffrey (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S251000, C174S261000, C174S262000, C439S091000, C439S066000, C361S803000
Reexamination Certificate
active
06271483
ABSTRACT:
SPECIFICATION
1. Technical Field
The present invention relates to a wiring board. More particularly, the present invention relates to a wiring board having a plurality of vias penetrating the wiring board from one side to the other side, which are radially extending from one side to the other side of the wiring board so that the interval between the vias on one side can be smaller than that between the vias on the other side.
2. Background Art
On the conventional wiring board, arranging of wires is conducted on a flat portion of its surface. Therefore, when the number of terminals of semiconductor elements to be mounted on the wiring board is increased, it is common to use a high density wiring board or a multiple layer wiring board on which a plane wiring layer is formed in multiple layers, so that the wiring density can be enhanced.
However, recently, semiconductor elements have become highly integrated. As a result, from the viewpoints of technique and manufacturing cost, it is difficult to provide a high density wiring board or a multiple layer wiring board to meet the demand for high integration.
The prior art to meet the demand for high integration is disclosed in Japanese Unexamined Patent Publication No. 56-146264. In the above patent publication, a wiring
30
board such as that shown in FIGS.
9
(
a
) to
9
(
c
) is disclosed.
As shown in FIG.
9
(
b
), this wiring board is composed as follows. Vias
102
,
102
, • •, which penetrate a wiring board
100
made of resin from one side
100
a
to the other side
100
b
, are radially extending along the direction from one side
100
a
to the other side
100
b
. As can be seen in FIG.
9
(
a
) showing a state on one side
100
a
of the wiring board
100
and can also be seen in FIG.
9
(
c
) showing a state on the other side
100
b
, interval Wa between the vias on one side
100
a
of the wiring board
100
is smaller than interval Wc between the vias on the other side
100
b.
According to the wiring board
100
shown in FIGS.
9
(
a
) to
9
(
c
), even when the vias
102
,
102
, • • are arranged on one side
100
a
of the wiring board
100
at high density so that flip chip type semiconductor elements (not shown), on the bottom surfaces of which a large number of bumps to be used as electrode terminals are provided, can be mounted on one side
100
a
, the vias
102
,
102
, • • can be arranged on the other side
100
b
of the wiring board
100
at low density so that external connecting terminals can be mounted. Due to the above arrangement, it is possible to provide a wiring board on which flip chip type semiconductor elements, which have been highly accumulated, can be mounted.
However, in the case of the wiring board
100
shown in FIGS.
9
(
a
) to
9
(
c
), since a plurality of vias
102
are electrically insulated from each other by the layers of insulating resin forming the wiring board
100
, there is a possibility that the vias
102
are in contact with and short-circuited to each other because the thicknesses of the resin layers to insulate the vias
102
from each other are extremely reduced on the side
100
a
of the wiring board
100
on which the vias
102
,
102
, • • are arranged at high density.
SUMMARY OF THE INVENTION
On the other hand, recently, there is a tendency to increased the rate of integration of the semiconductor elements. Accordingly, it is necessary to further reduce the interval Wa between the vias on the side
100
a
of the wiring board
100
.
Therefore, it is an object of the present invention to provide a wiring board characterized in that: vias penetrating the wiring board from one side to the other side are radially arranged in the direction from one side to the other side so that the interval of the vias on one side of the wiring board can be made smaller than the interval of the vias on the other side; and there is no possibility that the vias are electrically short-circuited even when the interval between the vias formed on one side of the wiring board is extremely reduced.
The inventors of the present application made investigation to solve the above problems. As a result of the investigation, the following knowledge has been found. When an electric conductor forming the via is covered with an organic insulator, even if the interval between the vias provided on one side of the wiring board is extremely reduced, there is no possibility that the electric conductors are contacted and short-circuited to each other. In this way, the inventors have accomplished the invention.
The present invention provides a wiring board characterized in that: a plurality of vias penetrating from one side to the other side of the wiring board are radially formed in the direction from one side to the other side of the wiring board so that an interval between the vias on one side of the wiring board can be made smaller than an interval between the vias on the other side; and the vias are coated with sheath portions made of the same electric conductor as that forming the cores of the vias.
In the present invention described above, on one side of the wiring board, the interval between the vias of which is smaller than that on the other side, when the vias are formed so that at least some of the sheath portions of the vias are in contact with the sheath portions of the adjacent vias, it is possible to form the vias on one side of the wiring board at high density.
The present invention provides a wiring board characterized in that: a plurality of vias penetrating from one side to the other side of the wiring board are radially formed in the direction from one side to the other side of the wiring board so that the interval between the vias on one side of the wiring board can be made smaller than the interval between the vias on the other side; an electric conductor forming a core of the via is coated with a first sheath portion made of an insulator; and the first sheath portion is coated with a second sheath portion which is a conductor layer.
In the present invention described above, on one side of the wiring board, the interval between the vias of which is smaller than that on the other side, when the vias are formed so that at least some of the second sheath portions of the vias can be contacted with the second sheath portions of the adjacent vias, it is possible to form the vias on one side of the wiring board at high density.
When the second sheath portion made of a conductor is electrically connected to a ground line formed on the wiring board, it is possible to form a coaxial-cable-like via in which the core made of a conductor is surrounded and shielded by the second sheath portion. The thus formed wiring board can be applied to a device in which high frequency is used.
In the case of the wiring board of the present invention, when the outer circumferential surface of the metallic wire of the via is coated with an insulator and the outer circumferential surface of the insulator is coated with a conductor layer, it is possible to form a via of the two layer structure.
According to the present invention, the conductor forming the core of the via is coated with the sheath portion made of an insulator. Therefore, even when the sheath portion of the via is contacted with the sheath portion of the adjacent via, there is no possibility that the cores are contacted and short-circuited with each other.
Due to the foregoing, in the case of the wiring board on which the vias penetrating the wiring board from one side to the other side are radially arranged in the direction from one side to the other side so that the interval between the vias on one side can be made smaller than the interval between the vias on the other side, even if the interval between the vias on one side of the wiring board is extremely reduced and the sheath portion of the via is contacted with that of the adjacent via, there is no possibility that the cores are contacted and short-circuited to each other.
Therefore, the interval between vias on one side of the wiring board can be further reduced. Ac
Horiuchi Michio
Suyama Toshiaki
Tokita Masakuni
Gaffin Jeffrey
Patel Ishwar B
Shinko Electric Industries Co., Ltd
Staas & Halsey , LLP
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