Wiring board having interconnect pattern with land, and...

Details Wiring board having interconnect pattern with land, and... Wiring board having interconnect pattern with land, and...

2005-10-25

2005-10-25

Williams, Alexander Oscar (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

On insulating carrier other than a printed circuit board

C257S780000, C257S696000, C257S698000, C257S690000, C257S691000, C257S774000, C257S680000, C257S773000, C257S788000, C361S774000, C361S736000, C361S746000, C361S760000, C361S807000, C361S809000, C174S255000, C174S356000, C174S259000, C174S260000

Reexamination Certificate

active

06958527

ABSTRACT:
A wiring board includes a substrate, and an interconnect pattern which is formed on the substrate and includes a land. A penetration hole, which exposes the substrate, is formed in the land. The penetration hole is formed in a region along a periphery of the land.

REFERENCES:
patent: 5973931 (1999-10-01), Fukasawa
patent: 6448504 (2002-09-01), Taguchi
patent: 6483191 (2002-11-01), Umezaki
patent: 6492714 (2002-12-01), Kasatani
patent: 6734557 (2004-05-01), Taniguchi et al.
patent: 2002/0064901 (2002-05-01), Miyazaki et al.
patent: 2002/0084107 (2002-07-01), Chang et al.
patent: 2003/0047801 (2003-03-01), Azuma
patent: A 11-297873 (1999-10-01), None
U.S. Appl. No. 09/700,464, filed Nov. 15, 2000, Hanaoka et al.
U.S. Appl. No. 10/678, 215, filed Oct. 6, 2003, Hanaoka.

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