Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2001-03-02
2003-02-18
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S737000, C257S774000
Reexamination Certificate
active
06522017
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a packaging technology for electronic components. More specifically, this invention relates to a wiring board produced utilizing a bump mounting system, a semiconductor device and a method of producing them. Here, the term “electronic components” used in this specification means various components that can be electrically connected and mounted onto a wiring board or an insulating substrate having applied thereon conductive portions such as electrodes, wiring, and so forth. More concretely, the term “electronic components” represents semiconductor chips such as IC chips and LSI chips, passive devices, power sources, and so forth. The electric components may also be a wiring board and an insulating substrate equipped with a conductor portion so long as an “electric connection” referred to in the present invention can be accomplished.
2. Description of Related Art
Requirements for reduction in size, thickness and weight and for higher functions have been increasing, in recent years, in the field of electronic appliances such as personal computers, cellular telephones, PHS phones, and so forth. To satisfy these requirements, a technology for packaging electronic components at high density on a wiring board has been development and has been put into practical application.
Various technologies are known as high density packaging technologies. One of them is a bump mounting technology on which the present invention is based. When electronic components are mounted and connected electrically onto a wiring board, this technology avoids the use of connecting wires the wiring of which is complicated and which cannot cope with a complicated structure. Instead, according to the bump mounting technology, the electronic components are directly mounted through metal bumps onto the wiring board.
FIG. 1
is a cross-sectional view of a prior art semiconductor device produced by directly connecting a semiconductor chip to a wiring board through metal bumps. The semiconductor device
50
includes a wiring board
51
having electrode pads
52
of copper (Cu), and a semiconductor chip (an LSI chip, in this example)
61
, as shown in the drawing. Metal bumps
62
of gold (Au) are disposed on electrodes (not shown) on the lower surface of the semiconductor chip
61
in such a fashion as to correspond to the electrode pads
52
, respectively. The electrode pads
52
and the metal bumps
62
are electrically connected to one another through a low melting point metal (Ag—Sn alloy or Pb—Sn alloy)
53
. The semiconductor chip
61
and the wiring board
51
are encapsulated with an electrically insulating thermosetting resin (epoxy resin)
54
to protect the resulting connections from external adverse influences.
The semiconductor device
50
shown in
FIG. 1
can be produced preferably by a method shown in FIG.
2
. First, the Au bumps
62
are formed at positions of the lower surface of the semiconductor chip
61
corresponding to the electrode pads
52
. The Au bumps
62
can be formed on Au plating on the electrodes. Since the Au bumps
62
are stud bumps, they can be formed by a stud bump method. Alternatively, the semiconductor chip
61
equipped with such bumps is commercially available.
In the wiring board
51
, on the other hand, the electrode pads
52
are formed by Cu plating, and then a low melting point metal (Ag—Sn alloy or Pb—Sn alloy)
53
is applied thereto. Then, the thermosetting epoxy resin
54
is applied to the entire surface of the wiring board
51
. Next, the semiconductor chip
61
is mounted onto the wiring board
51
as shown in the drawing. A flip-chip bonding machine can be used to mount the chip. After completion of mounting of the chip, heating is conducted under pressure to simultaneously conduct bonding between the Au bumps
62
and the Ag—Sn or Pb—Sn alloy and setting of the epoxy resin
54
. The heating temperature may be such that the Ag—Sn alloy or the Pb—Sn alloy can be molten and the epoxy resin can be sufficiently set. Generally, it is a temperature of not lower than 180° C. The semiconductor device shown in
FIG. 1
can be obtained after a series of steps described above.
SUMMARY OF THE INVENTION
As described above, the connection method using the metal bumps can contribute to high-density packaging and to downsizing of semiconductor devices, but cannot sufficiently achieve reduction of the thickness of the devices. In other words, because the metal bumps are sandwiched between the wiring board and the semiconductor chip in this structure, the devices are likely to become thick.
It is therefore an object of the present invention to provide a wiring board that has a simple structure, provides reliable electric connection and moreover contributes greatly to the reduction in size and thickness of semiconductor devices.
It is another object of the present invention to provide a semiconductor device that has a simple construction and reliable electric connection and yet is small in both size and thickness.
It is still another object of the present invention to provide methods useful in the production of the wiring board and the semiconductor device according to the present invention.
These and other objects of the present invention will be understood easily from the following detailed description.
The inventors of the present invention have conducted intensive studies to accomplish the objects described above, and have acquired the knowledge that it is effective to employ a bump connection method as a connection method and at the same time to accommodate a main part of a bump connection portion within a substrate such as a wiring board. Based on this observation, the present inventors have thus completed the present invention which will be described below.
According to one aspect of the present invention, there is provided a wiring board having a wiring layer to which one or more electronic components are electrically connected, characterized in that one or more through-holes closed at one of the ends thereof by the wiring layer are formed at predetermined positions of the wiring board, and a low melting point metal for electrically connecting the wiring layer to the electronic components is filled into the through-holes.
According to another aspect of the present invention, there is provided a method of producing a wiring board having a wiring layer to which one or more electronic components are electrically connected, the method comprising the steps of forming one or more through-holes closed at one of the ends thereof by the wiring layer, at predetermined positions of the wiring board, and filling the through-holes with a low melting point metal for electrically connecting the wiring layer to the electronic components.
According to still another aspect of the present invention, there is provided a semiconductor device comprising a wiring board bearing a wiring layer having a predetermined pattern, on the lower surface thereof, and one or more semiconductor chips mounted onto the upper surface thereof, the wiring layer being electrically connected to metal bumps applied onto the semiconductor chip, characterized in that one or more through-holes closed at one of the ends thereof by the wiring layer are formed at predetermined positions of the wiring board, the metal bumps are fitted into the through-holes, and the wiring layer and the metal bumps are electrically connected to one another through a low melting point metal filled into the through-holes.
According to still another aspect of the present invention, there is provided a method of producing a semiconductor device comprising a wiring board bearing a wiring layer having a predetermined pattern, on the lower surface thereof and one or more semiconductor chips mounted to the upper surface thereof, the wiring layer being electrically connected to metal bumps applied onto the semiconductor chip, characterized in that the method comprises the steps of forming one or more through-holes closed at one of the ends thereof by the wiring layer,
Horiuchi Michio
Kurihara Takashi
Paul & Paul
Potter Roy
Shinko Electric Industries Co. Ltd.
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