Wireless USB hardware scheduling

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S124000, C710S313000, C370S310000

Reexamination Certificate

active

07149839

ABSTRACT:
In wireless USB data transfers over UWB, software configures hardware thresholds to control data transfer in a manner that uses bandwidth for good connections over bad connections, given the high error rate experienced with wireless USB. Periodic transfers are first attempted before asynchronous transfers, as long as the periodic transfers are successful. When failures are occurring, the hardware includes a mechanism having a software-configurable threshold specifying the number of errors a given endpoint can tolerate before it is paused in the schedule. By pausing transfer attempts that are likely to again fail, endpoints with successful transfers are favored over those experiencing errors. When the number of active transfers pending exceeds a software-configurable notification threshold for isochronous endpoints, the hardware notifies the software of this state, corresponding to a low-buffer condition at the receiver. The software may then reconfigure thresholds and deactivate other transfers to force data transfers into the buffer.

REFERENCES:
patent: 6243753 (2001-06-01), Machin et al.
patent: 6378005 (2002-04-01), Hyder et al.
patent: 6603744 (2003-08-01), Mizutani et al.
patent: 6651171 (2003-11-01), England et al.
patent: 6788676 (2004-09-01), Partanen et al.
patent: 6950859 (2005-09-01), Bartek et al.
patent: 2006/0123181 (2006-06-01), Aull et al.
“A novel architecture of Home gateway for efficient packet process” by Cho et al. (abstract only) Publication Date:Jul. 10-12, 2002.

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