Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Pulse multiplication or division
Reexamination Certificate
2005-05-03
2005-05-03
Wambach, Margaret R. (Department: 2816)
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Pulse multiplication or division
C377S048000
Reexamination Certificate
active
06888913
ABSTRACT:
A frequency generating circuit utilizes a quad modulus prescaler in which two control signals are used to select the prescaler modulus. The modulus control signals are generated by a multistage counter in which two independent counting stages are used to generate the first and second modulus control signals. The first modulus control signal is at a first logic level when the associated counter is at a non-zero value and is at a second logic level when the associated counter reaches zero. The second modulus control signal is generated by a second counter and has a first logic value when the second counter is in a non-zero state and a second logic value when the second counter reaches zero.
REFERENCES:
patent: 6369623 (2002-04-01), Heinen
patent: 6574288 (2003-06-01), Welland et al.
Brown Charles D.
Qualcomm Incorporated
Seo Howard H.
Wadsworth Philip
Wambach Margaret R.
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