Wired endian method and apparatus for performing the same

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S074000, C710S062000, C710S100000, C712S204000, C712S225000, C717S159000, C717S162000, C709S250000

Reexamination Certificate

active

10816338

ABSTRACT:
A method and associated apparatus is provided for operating an electronic device in accordance with a wired endian format. More specifically, the wired endian format requires multi-byte values be maintained in transmit order. The wired endian format is defined to allow for interfacing with both a big endian format and a little endian format. Thus, a device operating in accordance with the wired endian format is able to interface with both a device operating in accordance with the big endian format (e.g., a Serial Attached SCSI (SAS) device) and a device operating in accordance with the little endian format (e.g., a Serial ATA (SATA) device). Furthermore, since the device operating in accordance with wired endian format implements circuitry compliant with the wired endian format, duplication of circuitry to define separate data paths for interfacing with the big endian and little endian formats, respectively, is avoided.

REFERENCES:
patent: 5948099 (1999-09-01), Crawford et al.
patent: 6472975 (2002-10-01), Beigel et al.
patent: 6622187 (2003-09-01), Brune et al.
patent: 6965956 (2005-11-01), Herz et al.
patent: 2006/0004935 (2006-01-01), Seto et al.

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