Wired combinational logic circuit with pullup and pulldown devic

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

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326 86, H03K 19094, H03K 190175

Patent

active

058049908

ABSTRACT:
A wired combinational logic arrangement responsive to N binary signal sources includes N circuits, one for each source. The circuits drive a common output terminal. Each circuit includes first and second devices for pulling the common terminal to first and second different voltages during successive abutting activation periods. The first device supplies a current to the common terminal that is considerably greater than the current supplied to the common terminal by the second device. The arrangement further includes a third device for pulling the common terminal to the second voltage at all times. The third device supplies a current to the common terminal that is either equal to or less than the current supplied by the second device.

REFERENCES:
patent: 4591742 (1986-05-01), Morito
patent: 5021684 (1991-06-01), Ahuja et al.
patent: 5047673 (1991-09-01), Kaneko
patent: 5153455 (1992-10-01), Walters, Jr.
patent: 5210449 (1993-05-01), Nishino et al.
patent: 5285119 (1994-02-01), Takahashi

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