Wire structure, a thin film transistor substrate of using...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C438S149000, C438S151000

Reexamination Certificate

active

06969889

ABSTRACT:
A thin film transistor array panel includes an insulating substrate, a gate wire formed on the insulating substrate. A gate insulating layer covers the gate wire. A semiconductor pattern is formed on the gate insulating layer. A data wire having source electrodes, drain electrodes and data lines is formed on the gate insulating layer and the semiconductor pattern. A protective layer is formed on the data wire. Pixel electrodes connected to the drain electrode via contact holes are formed on the protective layer. The gate wire and the data wire include triple layers of an adhesion layer, a Ag containing layer and a protection layer. The adhesion layer includes one of Cr, Cr alloy, Ti, Ti alloy, Mo, Mo alloy, Ta, Ta alloy, the Ag containing layer includes Ag or Ag alloy, and the protection layer includes one of IZO, Mo, Mo alloy, Cr and Cr alloy.

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patent: 6444296 (2002-09-01), Sasaki et al.
patent: 6674495 (2004-01-01), Hong et al.
patent: 6678018 (2004-01-01), Park et al.
patent: 11-337976 (1999-12-01), None
patent: 2000-77806 (2000-03-01), None
patent: 2001-0053696 (2001-07-01), None
Office Action from Taiwan Patent and Trademark Office; Decision on First Patent Examination by Intellectual Property Office Ministry of Economic Affairs; Issued Date: Jul. 30, 2003; Ref. No. (92) IP-2(1)-04077-09220769750; pp. 4-5.
PCT International Search Report; International application No. PCT/KR02/01417; International filing date of Jul. 26, 2002; Mailing date of Nov. 29, 2002.

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