Wire bonded wafer level cavity package

Details Wire bonded wafer level cavity package Wire bonded wafer level cavity package

2008-09-15

2010-12-28

Potter, Roy K (Department: 2822)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S118000

Reexamination Certificate

active

07858445

ABSTRACT:
A microelectronic device includes a chip having a front surface and a rear surface, the front surface having an active region and a plurality of contacts exposed at the front surface outside of the active region. The device further includes a lid overlying the front surface. The lid has edges bounding the lid, at least one of the edges including one or more outer portions and one or more recesses extending laterally inwardly from the outer portions, with the contacts being aligned with the recesses and exposed through them.

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