Wire bonded semiconductor device having low inductance and...

Details Wire bonded semiconductor device having low inductance and... Wire bonded semiconductor device having low inductance and...

2007-09-04

2007-09-04

Doan, Theresa (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S692000

Reexamination Certificate

active

11117878

ABSTRACT:
A semiconductor device has a semiconductor chip with a periphery and an IC organized in a core portion and a peripheral portion. The IC has a top level of interconnecting metal traces (510) from the peripheral portion to the core portion; the traces are covered by an insulating overcoat (520) which has peripheral windows to expose bond pads. The circuit further has at least one level of metal lines (511) on top of the insulating overcoat; the lines lead from the chip periphery towards the chip core, wherein each line (511) is substantially parallel to one of the traces (510) underneath the insulating overcoat and vertically aligned therewith. After assembling the chip onto a leadframe with segments (504), bonding wires (502) connect the bond pads (510a) and the metal lines (511a) with the segments.

REFERENCES:
patent: 5148265 (1992-09-01), Khandros et al.
patent: 5801074 (1998-09-01), Kim et al.
patent: 5925925 (1999-07-01), Dehaine et al.

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