Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Patent
1996-04-26
1998-03-31
Westin, Edward P.
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Output switching noise reduction
326 27, 326 83, H03K 1716, H03K 190175
Patent
active
057342717
ABSTRACT:
A wideband power driver having separate settings to delay a falling edge and rising edge of an output signal according to the present invention comprises an input node for receiving input signals and an output node for supplying output signals. A pulldown circuit is connected between the output node and a first supply voltage potential, the pulldown circuit having an input. A pullup circuit is connected between the output node and a second supply voltage potential, the pullup circuit having an input. A leakage current circuit is connected between the output node and the second supply voltage potential. A NOR gate has a first input, a second input connected to the input node, and an output. A first non-inverting delay element has an input connected to the output node and an output connected to the first input of said NOR gate. An inverting delay element has an input connected to the output of the NOR gate and an output connected to the input of the pullup circuit, and the inverting delay element is selected to provide a delay of the rising edge of the output signal. A second non-inverting delay element has an input connected to the input node and an output connected to the input of the pulldown circuit, and the second non-inverting delay element is selected to provide a delay of the falling edge of the output signal.
REFERENCES:
patent: 5063308 (1991-11-01), Borkar
patent: 5559452 (1996-09-01), Saito
patent: 5572146 (1996-11-01), Ahn et al.
patent: 5654648 (1997-08-01), Medhekar et al.
Grishakov Gennady Ivanovich
Tarasov Igor Vladimirovich
Roseen Richard
Sun Microsystems Inc.
Westin Edward P.
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