Wideband phase-locked loop with adaptive frequency response...

Details Wideband phase-locked loop with adaptive frequency response... Wideband phase-locked loop with adaptive frequency response...

2006-01-24

2009-12-15

Liu, Shuwang (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S215000, C375S294000, C375S327000, C375S362000, C375S373000, C375S374000, C375S375000

Reexamination Certificate

active

07634038

ABSTRACT:
A self-tuning 3rdorder type III phase-locked loop (PLL) is disclosed. In one aspect, the PLL provides frequency control that is implemented in three (3) parallel paths. The PLL provides frequency response tracking using a number of elements including a triple control voltage-controlled oscillator (VCO), a frequency-to-current (F2I) converter, and a switched capacitor loop filter. In addition to compensation for feedback ratio variation, near constant F2I gain over process variations and switched capacitor filters synchronized to a reference signal, near constant VCO gain over process variations allows the open loop frequency response to be tailored to track the reference signal. A high-speed locking technique is employed which significantly reduces acquisition time in low bandwidth cases. This PLL may be fabricated in a 0.18 μm CMOS logic process.

REFERENCES:
patent: 5128632 (1992-07-01), Erhart et al.
patent: 5426384 (1995-06-01), May
patent: 2005/0264369 (2005-12-01), Sowlati et al.
patent: 2007/0126514 (2007-06-01), Lin et al.

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