Wetting layer sidewalls to promote copper reflow into grooves

Details Wetting layer sidewalls to promote copper reflow into grooves Wetting layer sidewalls to promote copper reflow into grooves

1996-03-15

1997-08-05

Quach, T. N.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438672, 438687, 438632, H01L 21283

Patent

active

056542321

ABSTRACT:
A manufacturable method for forming a highly reliable electrical interconnection. An electrical interconnection pattern is first formed in a dielectric layer on a semiconductor substrate as recessed regions in the dielectric layer. Sidewalls containing a material which wets copper are then formed against the walls within the recessed regions. A conductive layer primarily comprising copper is thereafter deposited over the surface and in the recessed regions of the dielectric layer. The conductive layer is then reflowed to fill the recessed regions of the dielectric layer with substantially no void formation.

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