Wear leveling for low-wear areas of low-latency random read...

Details Wear leveling for low-wear areas of low-latency random read... Wear leveling for low-wear areas of low-latency random read...

2011-08-16

2011-08-16

Nguyen, Than (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S104000, C711S162000, C714S006100, C714S006320

Reexamination Certificate

active

08001318

ABSTRACT:
Described herein are method and apparatus for performing wear leveling of erase-units of an LLRRM device that considers all active erase-units. Wear counts of all active erase-units (containing client data) and free erase-units (not containing client data) are tracked. Wear counts are used to determine low-wear active erase-units having relatively low wear counts and high-wear free erase-units having relatively high wear counts. In some embodiments, data contents of low-wear active erase-units are transferred to high-wear free erase-units, whereby the low-wear active erase-units are converted to free erase-units and may later store different client data which may increase the current rate of wear for the erase-unit. The high-wear free erase-units are converted to active erase-units that store client data that is infrequently erased/written, which may reduce the current rate of wear for the erase-unit. As such, wear is spread more evenly among erase-units of the LLRRM device.

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