Wavelet zerotree image coding of ordered bits

Image analysis – Image compression or coding – Pyramid – hierarchy – or tree structure

Reexamination Certificate

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Details

C382S236000, C382S248000

Reexamination Certificate

active

07050640

ABSTRACT:
A computer system includes a memory and a processor. The memory stores a program to cause the processor to provide error data that indicate motion in an image. The processor represent each error signal as a collection of ordered bits, and the processor codes the bits of each order to indicate zerotree roots that are associated with the order.

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patent: PCT/US02/16357 (2002-05-01), None

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