Warm start cache recovery in a dual active controller with...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S113000, C711S114000, C711S145000

Reexamination Certificate

active

06490659

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a storage volume reservation system and method. More particularly, the present invention relates to a storage volume reservation system and method for maintaining cache coherency amongst a plurality of caching controllers in a data storage system during a warm start cache recovery.
BACKGROUND OF THE INVENTION
In
FIG. 1
there is illustrated a typical computer system
100
having a host computer
102
with a processor
104
and associated memory
106
, one or more data storage subsystems
108
,
110
each having a plurality of hard disk drives
112
,
114
, first and second storage controllers
116
,
118
coupled between the host computer and the storage subsystem by interfaces and communications links of conventional type, such as for example, busses or network connections. When the first and second controllers
116
,
118
are caching storage controllers (described below), each controller includes a cache memory
120
,
122
that serves as intermediate storage. Usually the cache memory is fast random access memory (RAM) of which there are many types.
Increasingly, there is a need to provide access to stored information or data on hard disk drives (or other storage devices) from a plurality of host servers and to also permit the data stored on any particular storage device to be accessed through alternative device controllers. Providing access to the data from multiple hosts eliminates the need to store the data at more than one location (though the data may still be redundantly stored using known mirroring or Redundant Array of Independent Disk (RAID) techniques) and in theory assures that the identical data can be accessed by interested parties. Providing multiple access to a storage device through a plurality of controllers, provides redundant access to the device from an alternate (or second) controller so that the data remains accessible in the event that the first controller fails.
Although providing access to storage devices through multiple controllers is desirable, such a configuration may present data consistency problems. Data consistency refers to all controllers providing visibility to one identical copy of the data. Data consistency can be provided through data synchronization or data coherency or both. Data coherency refers to maintaining a consistent copy of the data in each of the controllers caches. Data synchronization refers to keeping the data in the storage controller's cache the same as that in the storage device.
A storage controller is a device which is capable of directing data traffic from the host system to one or more non-volatile storage devices. It may or may not have an intermediary cache to stage data between the non-volatile storage device and the host system. A caching controller (or caching storage controller) is a device which is capable of directing the data traffic from a host system to one or more non-volatile storage devices which uses an intermediary data storage device (the cache memory) to stage data between the non-volatile storage device and the host system. In general, the intermediary storage device is built out of RAM to allow a quicker access time to the data. Furthermore, it provides a buffer in which to allow exclusive-or (XOR) operations to be completed for RAID
5
operations. Multiple active controllers are defined as a collection of storage controllers or caching storage controllers which work in a cooperative manner with each other. They provide the ability for recovering from a controller failure by allowing multiple paths to a storage volume. The storage volume is a contiguous range of randomly accessible sector of data. For practical purposes, the sector numbering starts at 0 and goes to N, where N is the total number of sectors available to the host system. A data extent is a range of data within a storage volume delineated by a starting sector and an ending sector. The storage volume is broken up into a number of data extents which are not required to be of equivalent sizes, but may not overlap. These concepts are used in the discussion of the background and the detailed description of embodiments of the invention, and apply to both.
Caching storage controllers that work independently of one another to store information or data to a secondary storage unit, such as a hard disk drive, or tape unit, are conventionally available. There are also caching storage controllers that work with one or more other controller(s) to provide multiple controller access to a secondary storage unit and provide a fault tolerant environment. If two controllers are simultaneously providing access to a common set of storage devices and each is able to take over the other's functionality in the event of a failure, then those controllers are referred to as active-active or dual-active controllers.
Computer system configurations involving one or more host computers and having two or more controllers that use cache technologies, with access to a storage device through any of the controllers, should desirably provide some mechanism of ensuring that the cache data in each controller is always correct. Unfortunately in conventional systems they may not. Controllers using the SCSI command set could use two commands that are provided in that command set, the “Reserve LUN” and “Release LUN” commands, where LUN is an abbreviation for Logical Unit Number. (SCSI commands, including the Reserve LUN and Release LUN commands, are described in standard references including SCSI-2 Small Computer System Interface-2 ANSI X3.131:1994: which is incorporated herein by reference.) The host computer, especially one operating in a cluster environment, could use these two commands to reserve all accesses to the entire LUN.
Unfortunately, not all host computers use these SCSI commands. Furthermore, the Reserve LUN and Release LUN commands do not provide for reservation of a portion of a storage volume because they apply to the entire storage volume.
The following description is provided relative to
FIG. 2
, and sets forth the problems with data synchronization between controllers which maintain local cached copies of data. This example details one set of host transactions that could cause data integrity problems (data consistency and data synchronization problems). The data consistency problem is brought about by the fact that each controller's cache operates independently.
With reference to the illustration in
FIG. 2
, there is shown a portion of computer system
130
, including host computer
132
having a processor or central processing unit (CPU)
134
, first controller (controller “A”)
136
, second controller (controller “B”)
138
, a storage subsystem
140
including at least one backing storage volume
142
. Each of the two controllers
136
,
138
further separately include first cache (Cache “A”)
144
and second cache (Cache “B”)
146
for caching data retrieved from backing storage volume
142
. Generic techniques for controller caching are known in the art and not described further here. Backing storage volume
142
is coupled to each of first and second controllers
136
,
138
by storage interface channels
148
,
150
, and the host computer processor (CPU)
134
is coupled to the controllers by CPU-to-storage device interface
152
The interface
152
may typically be implemented as a Personal Computer Interface (PCI), parallel SCSI, fibre channel, or IEEE-1394 (fire-wire) interface using a storage, file system, or other communications protocol. In like manner, the controller-to-storage device interfaces
148
,
150
may typically be implemented using the same set of interfaces and protocols as just described for interface
152
. A logical unit number (LUN) is assigned or otherwise associated with each backing storage volume
140
. The relationship between physical devices or portions thereof and logical devices is known in the art and not further described here.
In this configuration, if data is written to a logical unit, such as backing storage volume
142
A through first co

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