Wafer scale solder bump fabrication method and structure

Details Wafer scale solder bump fabrication method and structure Wafer scale solder bump fabrication method and structure

2005-03-08

2005-03-08

Nguyen, Ha Tran (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S725000, C438S781000, C430S312000, C430S313000

Reexamination Certificate

active

06864167

ABSTRACT:
A process and structure for the wafer scale fabrication of packaged semiconductor dies having solder bumps of less than about 300 μ. A method of forming solder bump electrical connections to electrical contact pads for semiconductor dies includes providing a semiconductor wafer having a plurality of semiconductor dies and associated electrical contact pads formed thereon. A passivation layer is formed and then covered with a layer of photodefinable material. The photodefinable material is patterned in a two-step process. In the first step, a developed photo mask ring is formed around the periphery of wafer. A central portion of the layer of photodefinable material is left for further photodefinition. In a second step, a pattern of openings is formed (in registry with registration with the underlying electrical contact pads) in the central portion. The exposure of the developed photo mask ring in the first step prevents the formation of openings around the periphery of wafer. Solder bumps are then formed by screen-printing solder into the pattern of openings to form solder bumps for the electrical contact pads. The wafer is singulated to form individual semiconductor dies.

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