Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2011-06-07
2011-06-07
Kebede, Brook (Department: 2894)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C414S935000, C414S940000, C414S941000
Reexamination Certificate
active
07956447
ABSTRACT:
A waffle pack device including a member having recesses in a surface of the member to accommodate die from at least one semiconductor wafer. The member is compatible with semiconductor wafer handling equipment and/or semiconductor wafer processing. Preferably, the member accommodates at least a majority of die from a semiconductor wafer. Further, one semiconductor device assembly method is provided which removes die from a singular waffle pack device, places die from the single waffle pack device on a semiconductor package to assemble from the placed die all die components required for an integrated circuit, and electrically interconnects the placed die in the semiconductor package to form the integrated circuit. Another semiconductor device assembly method is provided which removes die from at least one waffle pack device, places die from the at least one waffle pack device on a semiconductor package to assemble from the placed die device components required for an integrated circuit, and electrically interconnects the placed die in the semiconductor package to form the integrated circuit.
REFERENCES:
patent: 4395451 (1983-07-01), Althouse
patent: 4959008 (1990-09-01), Wasulko
patent: 4980971 (1991-01-01), Bartschat et al.
patent: 5597074 (1997-01-01), Ko
patent: 5836575 (1998-11-01), Robinson et al.
patent: 5971698 (1999-10-01), Dowling
patent: 5983468 (1999-11-01), Evans et al.
patent: 2003/0075939 (2003-04-01), Bendat et al.
patent: 2003/0124772 (2003-07-01), Wright
patent: 2005/0000866 (2005-01-01), Caparro et al.
patent: 04-014240 (1992-01-01), None
patent: 04-264751 (1992-09-01), None
patent: 06-216218 (1994-08-01), None
patent: 07-176511 (1995-07-01), None
patent: 07-254637 (1995-10-01), None
patent: 408335621 (1996-12-01), None
patent: 11-040658 (1999-02-01), None
patent: 11-307618 (1999-11-01), None
Notice of Reasons for Rejection, issued in JP application 2007-501825, mailed Oct. 26, 2010.
Office Action issued Nov. 15, 2010, in Singapore Patent Application No. 2006060776.
Search Report issued Dec. 7, 2010 in EP Application No. 05713952.9.
Australian Examination Report dated Aug. 25, 2010.
Enquist Paul M.
Fountain, Jr. Gaius G.
Petteway Carl T.
Kebede Brook
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
Ziptronix, Inc.
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