Wafer processing method

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S667000, C257S499000, C257S500000, C257S501000, C257S502000, C257S503000, C257S504000, C257S505000, C257S506000, C257S507000, C257S508000, C257S509000, C257S510000, C257S511000, C257S512000, C257S513000, C257S514000, C257S515000, C257S516000, C257S517000, C257S518000, C257S519000

Reexamination Certificate

active

07816264

ABSTRACT:
A wafer processing method having a step of reducing the thickness of a wafer in only a device forming area where semiconductor chips are formed by grinding and etching the back side of the wafer to thereby form a recess on the back side of the wafer. At the same time, an annular projection is formed around the recess to thereby ensure the rigidity of the wafer. Accordingly, handling in shifting the wafer from the back side recess forming step to a subsequent step of forming a back side rewiring layer can be performed safely and easily.

REFERENCES:
patent: 6884717 (2005-04-01), Desalvo et al.
patent: 2005/0121768 (2005-06-01), Edelstein et al.
patent: 2006/0292826 (2006-12-01), Kajiyama et al.
patent: 2007/0048896 (2007-03-01), Andry et al.
patent: 2008/0064187 (2008-03-01), Brown
patent: 2008/0265430 (2008-10-01), Ishihara
patent: A 2003-17495 (2003-01-01), None
patent: A 2005-136187 (2005-05-01), None
patent: WO 2005/043622 (2005-05-01), None

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