Wafer processing method

Details Wafer processing method Wafer processing method

2009-08-17

2010-12-28

Smith, Bradley K (Department: 2894)

Semiconductor device manufacturing: process

Semiconductor substrate dicing

Having specified scribe region structure

C438S460000

Reexamination Certificate

active

07858496

ABSTRACT:
Disclosed herein is a wafer processing method for dividing a wafer along a plurality of streets. The wafer processing method includes a back grinding step of grinding the back side of the wafer in an area corresponding to a device area to thereby reduce the thickness of the device area to a predetermined finished thickness and to simultaneously form an annular reinforcing portion on the back side of the wafer in an area corresponding to a peripheral marginal area, a wafer supporting step of attaching the back side of the wafer to a dicing tape, a kerf forming step of cutting the front side of the wafer along each street to thereby form a kerf having a depth corresponding to the thickness of the device area along each street, thereby dividing the device area into individual devices, and a peripheral marginal area removing step of peeling off the peripheral marginal area from the dicing tape.

REFERENCES:
patent: 2005/0260829 (2005-11-01), Uematsu et al.
patent: 2006/0166466 (2006-07-01), Maki et al.
patent: A 2007-19461 (2007-01-01), None

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