Metal treatment – Barrier layer stock material – p-n type – With recess – void – dislocation – grain boundaries or channel...
Reexamination Certificate
2000-02-01
2001-07-17
Chaudhari, Chandra (Department: 2813)
Metal treatment
Barrier layer stock material, p-n type
With recess, void, dislocation, grain boundaries or channel...
C438S401000, C438S798000
Reexamination Certificate
active
06261382
ABSTRACT:
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to a wafer marking which is used in the manufacture of semiconductors. A wafer or an entire batch of wafers can be identified from the marking or inscription. The coding contained in the inscription provides information about the various manufacturing and product data items, so that identification and assignment are possible at any time.
Various types of process steps are carried out on a wafer during the processing in order to produce semiconductor components, in which surface layers are removed both from the underneath and from the top. If, for example, bar codings are applied as markings, for example by a laser on the surface of a wafer, then the laser produces small depressions, points or so-called dots which produce bar codings, for example disposed in a row. These can be read by special readers for bar codings. However, the markings are subjected to all the process steps during manufacture.
Owing to the increasing number of processes and the use of so-called chemical mechanical processes (CMP), for example chemical and mechanical polishing on the front of the wafer, any inscription/marking applied to the front of the wafer is increasingly affected by the application and removal of layers. In the end, this can lead to the inscription being completely erased.
Previous markings or inscriptions on wafers are, for example, so-called hard marks, which are made very deeply on the rear of the wafer. However, such inscriptions are completely destroyed after the rear has been polished. Further disadvantages of hard marks are that the laser inscription process injects so much energy into the wafer that spattering occurs on the wafer surface. In the laser inscription process, the silicon is not melted, but it vaporizes at the processing point or at the laser impact point. As a rule, hard marks are burnt very deeply into the material. Such a depression (dot) is between 5 &mgr;m and 100 &mgr;m deep. Owing to the relatively large amount of energy injected, such dots are also irregular, and in some cases have sharp edges or peaks.
In addition to hard marks, it is known for so-called soft marks to be used for the marking of wafers. This can be done using the latest laser technology. The laser light is in this case injected into the wafer such that only the material at the surface is essentially melted. The inscription contains a plurality of dots produced by the laser. The result is a homogeneous inscription, free of any dirt. The depth of a normal soft mark is generally between 0.5 &mgr;m and 1 &mgr;m.
SUMMARY OF THE INVENTION ,
It is accordingly an object of the invention to provide a wafer marking that overcomes the above-mentioned disadvantages of the prior art devices of this general.
With the foregoing and other objects in view there is provided, in accordance with the invention, a wafer marking, including:
a plurality of depressions formed systematically into a wafer surface of a wafer and each having a circumferential rim and an outline selected from the group consisting of round outlines and elliptical outlines, the plurality of depressions in each case starting from the wafer surface have a depth of at least 4 &mgr;m and a rim height of a maximum of 1.5 &mgr;m, the plurality of depressions further having an internal diameter measured between intersections of the wafer surface and a surface of a depression being greater than 50 &mgr;m, and an overwhelming majority of the plurality of depressions having a gradient of not more than 0.2.
The invention is based on the object of providing a wafer marking containing a large number of depressions incorporated systematically into the wafer surface of a wafer which, together with their rim, form a very largely smooth surface.
The invention is based on the knowledge that the depth of the markings required for laser dots can be provided with a gradient at the rim and in the dot itself which is as minimal as possible. This results in a varnish coating being given maximum reliability, so that the probability of varnish cracks is greatly reduced. This is justified by the fact that there are neither any notches nor sharp edges in the dot, but around the dot.
A gradient in the lateral direction (dz/dx or dz/dy) of not more than 0.2 has been found to be particularly advantageous. The intersections at the cut in the dot surface with the original wafer surface and the minimum of each dot are in this case used as corner points. The intersection of the wafer surface with the inner surface of the raised rim of each dot is regarded as the internal diameter of a depression, or of a dot. The external diameter of a dot may be in a relatively wide range, from 60 to 120 &mgr;m. The depressions in the surface of a wafer can be produced by a laser beam which, with appropriate technology, ensures that no spattering whatsoever is produced by vaporizing material, with a depression being produced instead which is formed purely by melting of the material at the surface. Such a depression has a noticeable but relatively shallow depth with regard to the original wafer surface and is surrounded by a raised rim. This is produced by a focused laser beam.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a wafer marking, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
REFERENCES:
patent: 4597166 (1986-07-01), Iwai
patent: 5475268 (1995-12-01), Kawagoe et al.
patent: 5786267 (1998-07-01), Haraguchi et al.
patent: 5877064 (1999-03-01), Chang et al.
patent: 3324551A1 (1985-01-01), None
Japanese Patent Abstract No. 02224218 (Matsuo), dated Sep. 6, 1990.
“A close look at laser marking of silicon wafer”, Jim Scaroni et al., Solid State Technology, 1997, pp. 245-251.
Franke Steffen
Gerhard Detlef
Marx Eckhard
Chaudhari Chandra
Greenberg Laurence A.
Infineon - Technologies AG
Lerner Herbert L.
Stemer Werner H.
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