Wafer-level testing of optical and optoelectronic chips

Details Wafer-level testing of optical and optoelectronic chips Wafer-level testing of optical and optoelectronic chips

2007-08-28

2007-08-28

Toatley, Jr., Gregory J. (Department: 2877)

Optics: measuring and testing

By alignment in lateral direction

With registration indicia

C356S237400, C356S237500, C356S445000, C382S145000, C438S007000, C438S014000, C438S016000, C250S559400

Reexamination Certificate

active

11273753

ABSTRACT:
This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light from top of the wafer.

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“Mask Alignmnet. May 1, 1969.” May 1, 1969, IBM Technical Disclosure Bulletin, vol. 11, Issue No. 12, pp. 1683-1684.
“Automatic Mask/Wafer Alignment System,” Sep. 1, 1985, IBM Technical Disclosure Bulletin, vol. 28, Issue No. 4, pp. 1474-1479.

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