Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2007-12-25
2007-12-25
Nguyen, Ha Tran (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S763010
Reexamination Certificate
active
11014523
ABSTRACT:
Technologies suitable for on-wafer testing in the ubiquitous computing era are disclosed. Among the inventive features disclosed are: 1) clustering of wafer test probe landing area sites for parallel test sequencing; 2) on wafer test wiring that runs along the wafer's scribe regions; 3) on-wafer test wiring that can be scribed and yet thwart the spread of contamination into the product die; 4) an RFID tag design that allows for on-wafer testing without imposing substantial semiconductor surface area penalty; 5) an RFID tag design that includes built-in self test (BIST) circuitry for the RFID tag's non-volatile memory.
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Dennis Kiyoshi Hara, et al., “RFID Tag With Bist Circuits”, U.S. Appl. No. 11/014,076, filed Dec. 15, 2004. Notice of Allowance mailed Jun. 28, 2007and claims as they currently stand.
Robert M. Glidden, et al., “RFID Tag Design With Circuitry for Wafer Level Testing”, U.S. Appl. No. 11/014,075, filed Dec. 15, 2004. The Office Action mailed Mar. 6, 2007 and claims as they stood in the application prior to the mailing of the Office Action and claims as they currently stand.
Andrew E. Horch “On Die RFID Tag Antenna,” U.S. Appl. No. 11/069,005, filed Feb. 28, 2005, The Office Action mailed May 9, 2007 and claims as they currently stand.
Glidden Robert M.
Horch Andrew Edward
Hyde John D.
Kuhn Jay A.
Oliver Ronald A.
Blakely , Sokoloff, Taylor & Zafman LLP
Impinj, Inc.
Isla-Rodas Richard
Nguyen Ha Tran
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