Wafer level packaging process of semiconductor

Details Wafer level packaging process of semiconductor Wafer level packaging process of semiconductor

1999-12-30

2001-06-05

Le, Vu A. (Department: 2824)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

C438S110000, C438S113000, C438S118000, C257S723000, C257S724000

Reexamination Certificate

active

06242283

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a packaging process of semiconductor, and more particularly to a wafer level packaging process of semiconductor.
2. Description of Related Art
After completing the manufacturing of semiconductor devices on the wafer, the conventional packaging process is to perform a die sawing step in order to cut the wafer into many dies, then to perform packaging process respectively so as to form various types of IC packages. However, since the semiconductor devices formed on the wafer are very tiny in size, they are subject to damage resulted from die handling, small particles in the air, moisture and airflow etc.
The foregoing problems are resulted from the process that performs packaging process after the dies are cut from the wafer. A conventional way to resolve the problems is to perform the wafer level process first before performing the die sawing process. Additionally, the package size of the wafer level packaging is closed to that of the die, thereby the size of the package can be greatly reduced which meet the current requirements of “Light, Thin, Short, and Small” in packaging design.
However, the conventional wafer level packaging processes consisting of processes such as flux coating on the carrier of the wafer, and solder-ball planting etc. are apt to damage the surface of the wafer or contaminate the devices. Moreover, since the flux coated on the carrier is hard to get rid of, thereby, the flux is apt to remain on the wafer. The residual flux on the wafer will affect the electrical performance of the semiconductor products, and consequently will reduce the yield and increase the manufacturing cost.
SUMMARY OF THE INVENTION
Therefore, the present invention provides a wafer level packaging process of semiconductor. The process is described as follows: First of all, it is to provide a substrate, having a first surface and a second surface wherein the substrate is constituted by a plurality of carriers densely disposed is series. And each of the carriers has an opening located at the center portion of the carrier, and a plurality of bonding fingers is disposed on the second surface at the periphery of the opening. Also, a plurality of connecting points is disposed on the outer edges of the bonding fingers that are electrically connected to the connecting points. Next, to provide a wafer constituted by a plurality of dies wherein an active surface of the die has a plurality of bonding pads. Then, to provide an adhesive layer in order to bond the first surface of the substrate to the active surface of the die wherein each of the carriers corresponds to each of the dies, and the bonding pads are corresponding to the openings of the carriers. Thereafter, to perform a wire bonding process in order to form a plurality of bond wires to make electrical connections between the bonding pads of the dies and their corresponding bonding fingers of the carriers. Subsequently, to perform an encapsulating process by using a molding compound to fill the openings and to encase the bond wires, the bonding pads, and the bonding fingers. Finally, to perform a die sawing process in order to form a plurality of complete packages of a wafer level packaging.
In accordance with a preferred embodiment of the present invention, the process for forming connecting points comprises bumps formed by electroplating and electro-plateless process or solder balls formed by solder-ball planting wherein the bumps are balls or flat plates in shape. Besides, the material of the connecting points comprises a tin-lead alloy having high percentage of content in lead and having relatively high melting point.
In the process of the present invention, the dies are bonded to the carriers after the bumps are formed on the carriers, thereby, the die are protected from being contaminated and damaged, consequently, the yield can be improved and the manufacturing cost can be lowered.


REFERENCES:
patent: 4843036 (1989-06-01), Schmidt et al.
patent: 4892245 (1990-01-01), Dunaway et al.
patent: 5677576 (1997-10-01), Akagawa
patent: 5917242 (1999-06-01), Ball
patent: 5920118 (1999-07-01), Kong
patent: 5990546 (1999-11-01), Igarashi et al.
patent: 6054772 (2000-04-01), Mostafazadeh et al.

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