Wafer level package and multi-package stack

Details Wafer level package and multi-package stack Wafer level package and multi-package stack

2006-01-03

2006-01-03

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S621000, C257S673000, C257S693000, C257S737000, C257S738000, C257S773000

Reexamination Certificate

active

06982487

ABSTRACT:
A semiconductor chip package includes a semiconductor chip having a through hole extending there through from an active first surface to an inactive second surface. A first conductive pad at least partially surrounds the through hole on the active first surface of the semiconductor chip. The package also includes a printed circuit board having a first surface attached to the inactive second surface of the semiconductor chip, and a second conductive pad aligned with the through hole of the semiconductor chip. A conductive material fills the through hole and contacts the first and second conductive pads.

REFERENCES:
patent: 4700276 (1987-10-01), Freyman et al.
patent: 4700473 (1987-10-01), Freyman et al.
patent: 5046238 (1991-09-01), Daigle et al.
patent: 5202754 (1993-04-01), Bertin et al.
patent: 5229647 (1993-07-01), Gnadinger
patent: 5877034 (1999-03-01), Ramm et al.
patent: 5973396 (1999-10-01), Farnworth
patent: 6087719 (2000-07-01), Tsunashima
patent: 6168969 (2001-01-01), Farnworth
patent: 6392292 (2002-05-01), Morishita
patent: 6400008 (2002-06-01), Farnworth
patent: 6429096 (2002-08-01), Yanagida
patent: 6444576 (2002-09-01), Kong
patent: 6448661 (2002-09-01), Kim et al.
patent: 6459150 (2002-10-01), Wu et al.
patent: 6735857 (2004-05-01), Saito et al.
patent: 6809421 (2004-10-01), Hayasaka et al.
patent: 2002/0110953 (2002-08-01), Ahn et al.
patent: 8-213427 (1996-08-01), None
patent: 9-307013 (1997-11-01), None
patent: 11-163521 (1999-06-01), None
patent: 2000-49277 (2000-02-01), None
patent: 2001-135776 (2001-05-01), None
patent: 2001-148457 (2001-05-01), None
patent: 2002-26240 (2002-01-01), None
patent: 2002-76247 (2002-03-01), None
patent: 2002-118198 (2002-04-01), None
patent: 1999-003745 (1999-01-01), None

Affiliated with

Also associated with

Rating

Wafer level package and multi-package stack does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Wafer level package and multi-package stack, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wafer level package and multi-package stack will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3593428