Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2007-09-25
2007-09-25
Wilczewski, M. (Department: 2822)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S114000, C438S108000, C438S465000
Reexamination Certificate
active
11213847
ABSTRACT:
A wafer-level package and an IC module assembly method for a wafer-level package are provided in the present invention. The method comprises forming a metal bump on a wafer, applying a high polymer resin coating to the wafer, grinding a surface of the resin coating, printing an endpoint on the wafer, a grinding and cutting step and bonding the chips to an antenna or substrate with SMT. The present invention can be used to manufacture high quality chips of low cost with mass production to significantly reduce cost and maintain high quality of the products.
REFERENCES:
patent: 5703755 (1997-12-01), Flesher et al.
patent: 5925934 (1999-07-01), Lim
patent: 6291270 (2001-09-01), Saito
patent: 6506681 (2003-01-01), Grigg et al.
patent: 6579748 (2003-06-01), Okuno et al.
patent: 6649445 (2003-11-01), Qi et al.
patent: 6653731 (2003-11-01), Kato et al.
patent: 6900532 (2005-05-01), Kelkar et al.
patent: 6905946 (2005-06-01), Grigg et al.
patent: 6908784 (2005-06-01), Farnworth et al.
patent: 6949834 (2005-09-01), Connell et al.
patent: 6965160 (2005-11-01), Cobbley et al.
patent: 6995041 (2006-02-01), Connell et al.
patent: 7002245 (2006-02-01), Huang et al.
patent: 7019406 (2006-03-01), Huang et al.
patent: 2002/0041039 (2002-04-01), Bai
patent: 2004/0121563 (2004-06-01), Farnworth et al.
patent: 2005/0001785 (2005-01-01), Ferguson et al.
patent: 2005/0258537 (2005-11-01), Huang et al.
patent: 2006/0027936 (2006-02-01), Mizukoshi et al.
patent: 2006/0030071 (2006-02-01), Mizukoshi et al.
patent: 2006/0030081 (2006-02-01), Connell et al.
patent: 2006/0134901 (2006-06-01), Chaware et al.
patent: 2007/0020815 (2007-01-01), Chaware et al.
patent: 2007/0152325 (2007-07-01), Dani et al.
Hershkovitz Abe
Hershkovitz & Associates
Mutual-Pak Technology Co. Ltd.
Wilczewski M.
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