Wafer level incapsulation chip and encapsulation chip...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C438S106000, C438S124000, C438S127000, C438S456000, C438S458000, C257S684000, C257S787000, C257S698000, C257S699000, C257S708000, C257SE23016, C257SE23012, C257SE23031, C257SE23067, C257SE23116

Reexamination Certificate

active

07906841

ABSTRACT:
A wafer level encapsulation chip and an encapsulation chip manufacturing method. The encapsulation chip includes a device substrate, a circuit module mounted on the device substrate, a bonding layer deposited on a predetermined area of the device substrate, a protection cap forming a cavity over the circuit module and bonded to the device substrate by the bonding layer and encapsulation portions formed on predetermined areas of the bonding layer and the protection cap. Thus, the present invention can minimize damages to a chip upon chip handling and prevent moisture from being introduced into the inside of the chip.

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patent: 11-251493 (1999-09-01), None
patent: 2001-035972 (2001-02-01), None
Communication dated Jul. 28, 2006 issued by the Korean Intellectual Property Office in Korean Application No. 2005-63439.

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