Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2006-12-29
2008-11-04
Clark, Jasmine J (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S773000, C257S780000, C257S781000, C257S778000, C257SE23023, C257SE23069
Reexamination Certificate
active
07446405
ABSTRACT:
A wafer level chip scale package includes a semiconductor chip having a plurality of pads; a lower insulation layer having a high Young's modulus of 1˜5 GPa formed on the semiconductor chip to expose the plurality of pads; a plurality of metal patterns formed on the lower insulation layer to be connected to the respective pads; an upper insulation layer having a high Young's modulus of 1˜5 GPa formed on the lower insulation layer and the metal patterns to partially expose the metal patterns; and a plurality of solder balls formed on exposed portions of the metal patterns.
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Deok-Hoon Kim et al; “Solder joint reliability of a polymer reinforced wafer level package” Microelectronics Reliability 42 (2002) pp. 1837-1848.
Jinwon Joo et al; “Characterization of flexural and thermo-mechanical behavior of plastic ball grid package assembly using moiré interforometry” Microelectronics Reliability 45 (2005) pp. 637-646.
Han Kwon Whan
Kim Jong Hoon
Kim Seong Cheol
Park Chang Jun
Suh Min Suk
Clark Jasmine J
Hynix / Semiconductor Inc.
Ladas & Parry LLP
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