Wafer-level bonding for mechanically reinforced ultra-thin die

Semiconductor device manufacturing: process – Semiconductor substrate dicing

Reexamination Certificate

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C438S106000, C438S113000, C438S122000, C438S455000, C438S458000, C257S678000

Reexamination Certificate

active

07435664

ABSTRACT:
An embodiment of the present invention is a technique to fabricate a package. A metal sheet having trenches is formed. A thinned wafer supported by a wafer support substrate (WSS) is formed. The metal sheet is bonded to the WSS-supported thinned wafer to form a metal bonded thinned wafer. The thinned wafer is diced to the trenches into die assemblies.

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patent: 2005/0148160 (2005-07-01), Farnworth et al.
patent: 2007/0166878 (2007-07-01), Li
patent: 2008/0003719 (2008-01-01), Lu et al.
patent: 2008/0044985 (2008-02-01), Polinsky et al.
So, William W., et al., “High Temperature Joints Manufactured at Low Temperature”, IEEE, 1998, Electronics Components and Technology Conference, pp. 284-291.
Bock, K., et al., “New Manufacturing Concepts for Ultra-Thin Silicon and Gallium Arsenide Substrates”, 2003, International Conf. on Compound Semiconductor Mfg.

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