Wafer level ball grid array

Details Wafer level ball grid array Wafer level ball grid array

2006-06-13

2006-06-13

Le, Dung A. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257S777000, C257S782000, C438S613000

Reexamination Certificate

active

07061123

ABSTRACT:
A manufacturing technique that involves embedding one or more semiconductor die into a support substrate and forming conductive traces that lead from die contact pads to redistributed contact pads on the support substrate. Active surfaces of the dice and a working surface of the support substrate are substantially coplanar and the conductive traces are formed on the coplanar surfaces. The redistributed contact pads are sufficiently spaced apart from each other so that conductive balls can be formed thereon. Individual semiconductor device packages are singulated from the support substrate.

REFERENCES:
patent: 5620928 (1997-04-01), Lee et al.
patent: 2004/0033673 (2004-02-01), Cobbley et al.
patent: 2004/0127011 (2004-07-01), Huang et al.
patent: 2005/0082682 (2005-04-01), Liu
patent: 2005/0133935 (2005-06-01), Vasishta et al.

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