Wafer layout of semiconductor device

Details Wafer layout of semiconductor device Wafer layout of semiconductor device

1996-07-16

1999-02-16

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Electromagnetic or particle radiation

257449, 257594, 257601, 257797, 257926, 438 33, 438 68, 438113, H01L 2358

Patent

active

058723862

ABSTRACT:
A wafer layout for a multi-channel device for improving the yield of operative devices comprises a semiconductor wafer and a plurality of semiconductor devices formed in the semiconductor wafer, each device comprising a consecutive series of impurity regions formed in the semiconductor wafer, the impurity regions being arranged consecutively without separation between the respective semiconductor devices, such that each of the semiconductor devices is indistinguishable from the others, without regard to defective devices, and a single semiconductor device comprising a plurality of consecutive impurity regions formed in the semiconductor wafer may be cut from the wafer by cutting therefrom any of the plurality of consecutive impurity regions formed therein. The invention is particularly useful for the fabrication of strip diodes and the like.

REFERENCES:
patent: 3742598 (1973-07-01), Nishida
patent: 5051807 (1991-09-01), Morozumi
patent: 5262668 (1993-11-01), Tu et al.
patent: 5300806 (1994-04-01), McClurg
patent: 5559361 (1996-09-01), Pezzani
patent: 5561317 (1996-10-01), Momma et al.

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