Wafer having chamfered bend portions in the joint regions betwee

Metal treatment – Barrier layer stock material – p-n type – With recess – void – dislocation – grain boundaries or channel...

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437225, 437249, H01L 2930

Patent

active

052307476

ABSTRACT:
A wafer having chamfered bent portions in the joint regions between the contour of the wafer and the cut-away portion of the wafer such as an orientation flatness. The chipping of the wafer can be prevented, and in coating the wafer with a photoresist, forming an epitaxially grown layer on the wafer, etc., films having desired characteristics can be provided on the surface of the wafer.

REFERENCES:
patent: 3951728 (1976-04-01), Egashira et al.
patent: 4228937 (1980-10-01), Tocci
patent: 4256229 (1981-03-01), Lee
patent: 4344260 (1982-08-01), Ogiwara
patent: 4488930 (1984-12-01), Koe
patent: 4630093 (1986-12-01), Yamaguchi et al.
patent: 4783225 (1988-11-01), Maejima et al.
IBM Technical Disclosure Bulletin, vol. 22, No. 3 (Aug. 1979), "Diagnostic Method for Locating the Wafer Position in a Crystal".
IBM Technical Disclosure Bulletin, vol. 11, No. 12, (May 1969), "Duffusion Boat".
Semiconductor Silicon Manufacturing and Machining Using Diamond Tools-G. Janus, Burghausen, IDR13 Nr. 3, pp. 234-242 (1979).
Silicon Wafers with Optimum Edge Rounding, Solid State Technology, pp. 16-17, May 1976.
Solid State Technology, May 1976, vol. 19, Magazine 5, pp. 37-42.
Industrie Diamanten Rundschau, IDR 13 (1979), No. 3, pp. 234-242 (in German).

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