Wafer flattening process

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S711000, C438S712000, C438S719000

Reexamination Certificate

active

06303511

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a wafer flattening process for etching and flattening a projecting portion of a wafer surface locally by an activated species gas or a process for locally etching a relatively thick portion of a wafer to achieve a uniform distribution of thickness of the wafer.
2. Description of the Related Art
FIG. 6
is a schematic cross-sectional view of a local etching apparatus for showing an example of a wafer flattening process of the related art.
In
FIG. 6
, reference numeral
100
is a plasma generator. Activated species gas G in the plasma generated by the plasma generator
100
is sprayed on the front surface of a silicon wafer W from a nozzle portion
101
.
The silicon wafer W is placed and secured on a stage
120
. The stage
120
is made to move in the horizontal direction to guide a portion relatively thicker than a prescribed thickness on the surface of the silicon wafer W (hereinafter referred to as a “relatively thick portion”) directly under the nozzle portion
101
.
The activated species gas G is then sprayed from the nozzle portion
101
to the projecting relatively thick portion Wa to locally etch the relatively thick portion Wa and achieve a uniform distribution of thickness of the surface of the silicon wafer W and thereby flatten the surface of the silicon wafer W.
The above wafer flattening method of the related art, however, suffered from the following problem.
The activated species gas G sprayed from the nozzle portion
101
included a large number of ions in addition to the neutral radicals. These ions also struck the silicon wafer W, so the portions where the ions struck were seriously damaged. As a result, the micro-roughness of the silicon wafer W increased.
SUMMARY OF THE INVENTION
The present invention was made to solve the above problem and has as its object to provide a wafer flattening process for improving the micro-roughness of a wafer by performing local etching while maintaining a predetermined distance between a plasma discharge location and wafer surface.
To achieve the above object, according to an aspect of the invention, there is provided a wafer flattening process comprising a plasma generating step for causing plasma discharge of a predetermined gas in a discharge tube to produce an activated species gas and spraying that activated species gas from a nozzle portion of the discharge tube and a local etching step for locally etching a relatively thick portion present on the surface of a wafer by the activated species gas sprayed from the nozzle portion while moving the nozzle portion of the discharge tube relatively along the surface of the wafer, wherein the distance from an approximate center of a plasma discharge location of a predetermined gas to the surface of wafer is set to at least a distance whereby the ions in the activated species gas are extinguished by repeated collision within the activated species gas or their lifetime and whereby the etching depth of the wafer becomes substantially a desired value.
Due to this configuration, by executing the plasma generating step, plasma discharge of a predetermined gas in the discharge tube is caused to produce an activated species gas which is then sprayed from the nozzle portion of the discharge tube. By executing the local etching step next, the nozzle portion of the discharge tube is made to move relatively along the surface of the wafer so that a relatively thick portion present on the surface of the wafer is locally etched by the activated species gas sprayed from the nozzle portion. By executing this step over the entire wafer, the entire surface of the wafer is flattened. However, a large number of ions are present in the activated species gas. Therefore, when the activated species gas is sprayed on to the wafer, the ions inflict damage on the wafer surface and the micro-roughness of the wafer increases. In the present invention, however, since the distance from the approximate center of the plasma discharge location of the predetermined gas to the surface of the wafer is set to at least a distance whereby the ions in the activated species gas are extinguished by repeated collision in the activated species gas or their lifetimes, the ions are extinguished before reaching the wafer surface and only neutral radicals are sprayed on the wafer surface. This being said, if the distance from the approximate center of the plasma discharge location to the wafer surface is too large, the amount of the neutral radicals reaching the wafer is reduced and the desired etching shape cannot be obtained. In the present invention, however, since the distance is set to a distance whereby an etching depth of the wafer by the activated species gas becomes an approximately desired value, it is possible to obtain the desired etching shape.
Any gas may be used for the plasma discharge, but as an example, according to an embodiment of the invention, the predetermined gas is one of a gas of a halogen compound or a mixed gas including a halogen compound and where the distance from the approximate center of the plasma discharge location to the surface of the wafer is a distance larger than 3000 times a mean free path of the ions produced in the activated species gas and smaller than 6000 times. As a specific example, according to an embodiment of the invention, the halogen compound is one of sulfur hexafluoride, carbon tetrafluoride, or nitrogen trifluoride.


REFERENCES:
patent: 4668337 (1987-05-01), Sekine et al.
patent: 4876983 (1989-10-01), Fukuda et al.
patent: 6-5567 A (1994-01-01), None
patent: 6-5571 A (1994-01-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Wafer flattening process does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Wafer flattening process, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wafer flattening process will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2614186

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.