Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond
Patent
1997-01-24
1999-06-08
Whitehead, Jr., Carl
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Wire contact, lead, or bond
257773, 257787, 257506, H01L 2348, H01L 2352, H01L 2940
Patent
active
059106875
ABSTRACT:
A packaging technique for electronic devices includes wafer fabrication of contacts on the bottom surface of the substrate underneath the active circuit. Inherently reliable contacts suitable for a variety of devices can be formed, via a simple fabrication process, with good wafer packing density. In one embodiment, a trench is formed in the top surface of a substrate parallel to the edge of its electronic circuit. A gold wire extends from a connection point within the circuit into the trench. The gold wire may run over an insulating layer that ends part way through the trench. After epoxy encapsulating the top of the substrate, it is back thinned to expose the bottom surface of the gold wire. Either the back thinning is selective so as to form a substrate standoff, or an epoxy standoff is applied to the bottom of the substrate. A solderable wire runs onto the standoff from the gold wire exposed on the protrusion, possibly over another insulation layer. If an insulative substrate is used, the insulation layers may be optional. Sawing separates the electronic devices and completes their fabrication, without a subsequent assembly step. In another embodiment, the trench in which the gold wires and the solderable wires connect is formed from the bottom of the substrate after it has been epoxy encapsulated. Optionally, the bottom surface of the substrate of the finished device drops down to be co-planar with the contact bottom surfaces, so as to conduct heat out of the device.
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Chen Changsheng
Marcoux Phil P.
Sander Wendell B.
Young James L.
ChipScale, Inc.
Clark J. V.
Jr. Carl Whitehead
LandOfFree
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