Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
1998-06-09
2001-07-24
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S691000, C438S959000, C451S259000
Reexamination Certificate
active
06265314
ABSTRACT:
BACKGROUND OF THE INVENTION
1. FIELD OF THE INVENTION
This invention generally relates to semiconductor processing, and, more particularly, to the manufacturing of semiconductor devices.
2. DESCRIPTION OF THE RELATED ART
Generally speaking, semiconductor devices are manufactured by forming a number of layers or films of material on a semiconductor substrate, typically called a wafer, and patterning these layers or films to form the desired electrical devices, e.g., transistors, capacitors, etc. However, there are many irregularities and defects that exist on or near the edge region of the wafer.
For example, the various process layers formed at or near the edge region of the wafer, or portions thereof, may not adhere very well and may be too thick or too thin. Additionally, in the edge regions of the wafer, process layers may be stacked on previous layers with which they are incompatible, process layers may be only partially formed, and removal of process layers (when desired) may be incomplete. These problems may result in holes being formed in the layers, as well as layers flaking or breaking, thereby increasing the amount of contaminants that are available to interfere with the fabrication of semiconductor devices. Such irregularities and defects may also lead to delaminations of the layers and cause cracks that may propagate from the edge region of the wafer into the main body of the wafer during subsequent processing of the wafer.
The irregularities and defects that may occur at the edge region of a wafer may occur for a number of reasons. For example, in high-temperature processes normally encountered in semiconductor manufacturing, such as in tube furnaces, there is always some temperature variation across the wafer. These variations may be greater at the wafer's outer edges where cooling and heating may occur more rapidly. Additionally, repeated touching and handling of the wafer during manufacturing operations is another reason that irregularities and defects may occur at the wafer's edge. The edge of the wafer may also contain a variety of defects due to various process steps. For example, the edge of the wafers may sometimes be subjected to clamping during various process steps. This clamping may leave marks, indentions, cracks or scratches on the layers at the edge of the wafer.
Problems and defects such as those discussed above are even more troublesome as features sizes on semiconductor devices become smaller and smaller. Generally speaking, smaller feature sizes require cleaner manufacturing environments, i.e., the number of contaminants in the manufacturing environment must be reduced. In turn this requires that all potential sources of contaminants, including those originating at the wafer's edge, must be reduced or eliminated.
The present invention is directed to a method and device that solves some or all of the aforementioned problems.
SUMMARY OF THE INVENTION
The present invention is directed to a method for manufacturing semiconductor devices. The method generally comprises forming a plurality of process layers on a wafer having an edge region with a number of defects existing thereon. Thereafter, the method comprises removing all or a substantial portion of the defects existing on the edge region of the wafer.
REFERENCES:
patent: 5185965 (1993-02-01), Ozaki
patent: 5426073 (1995-06-01), Imaoka et al.
patent: 5657537 (1997-08-01), Saia et al.
patent: 5691248 (1997-11-01), Cronin et al.
patent: 5972802 (1999-10-01), Nakano et al.
Black Hang Thi Yen
Ehrichs Edward E.
Advanced Micro Devices , Inc.
Chen Kin-Chan
Utech Benjamin L.
Williams Morgan & Amerson
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