Wafer dividing method

Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257SE21599, C257SE21602

Reexamination Certificate

active

07384858

ABSTRACT:
A wafer dividing method for dividing a wafer along a first set of plural streets extending parallel to each other, and a second set of plural streets extending parallel to each other and extending perpendicularly to the first set of the streets, the wafer having a plurality of rectangular regions defined on the face thereof by these streets. The wafer dividing method includes a groove forming step of forming grooves along the streets on the face of the wafer, and a grinding step of grinding the back of the wafer after the groove forming step. The grooves formed by the groove forming step include grooves having a first depth D1, and grooves having a second depth D2which is greater than the first depth D1(D2>D1).

REFERENCES:
patent: 2002/0055238 (2002-05-01), Sugino et al.
patent: 2003/0186513 (2003-10-01), Turner et al.
patent: 2005/0233549 (2005-10-01), Eshleman
patent: 2003-17442 (2003-01-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Wafer dividing method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Wafer dividing method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wafer dividing method will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2810637

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.