Etching a substrate: processes – Gas phase etching of substrate – Application of energy to the gaseous etchant or to the...
Reexamination Certificate
2000-11-16
2002-12-31
Powell, William A. (Department: 1765)
Etching a substrate: processes
Gas phase etching of substrate
Application of energy to the gaseous etchant or to the...
C216S018000, C216S039000, C428S544000, C428S548000, C438S719000, C438S720000
Reexamination Certificate
active
06500355
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 89122536, filed Oct. 26, 2000.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a protective structure on a silicon wafer. More particularly, the present invention relates to a conductive structure on a silicon wafer for preventing plasma damage.
2. Description of Related Art
In integrated circuit (IC) manufacture, the dimensional requirement of each device are getting smaller while the aspect ratio of etching or gap filling is getting higher. Consequently, high-density plasma has to be used in dry etching or chemical vapor deposition (CVD) (for example, plasma-enhanced CVD or high-density plasma CVD). For example, plasma density has increased from a former value of 10
9
~10
10
/cm
3
to a current value of about 10
11
~10
12
/cm
3
.
However, as plasma density rises, any non-uniform charge distribution frequently can lead to arcing. Arcing is an electrical phenomena that results when electric charges jump from a region of high plasma density to a region of low plasma density through a silicon wafer so that electric potential in these regions are equalized. Since the electric potential and current density involved in each arcing process is very high, path inside the wafer through which the current runs may cause serious damages. Therefore, methods of preventing direct arcing through a wafer despite using high-density plasma in various processes are critical to success in semiconductor manufacturing.
SUMMARY OF THE INVENTION
Accordingly, one object of the present invention is to provide a conductive structure in a silicon wafer for preventing plasma damage. The wafer includes a plurality of dies and a plurality of scribe lines between the dies. The semiconductor substrate of this wafer also includes a plurality of conductive layers. The conductive structure comprises of a plurality of ground wires and a plurality of contacts. The ground wires are distributed inside the scribe lines and are positioned at least in the uppermost conductive layer. The contacts are used for connecting the ground wires and the semiconductor substrate electrically. When other conductive layers other than the uppermost conductive layer also contain ground wire connections, the ground wires in different conductive layers are electrically connected by a plurality of plugs.
This invention also provides a method of manufacturing a conductive structure capable of preventing plasma damage in a silicon wafer. First, a plurality of contacts electrically connected with a semiconductor substrate is formed in a plurality of scribe lines. The conductive layers on the scribe lines are patterned when conductive patterns re formed in the die section. Ultimately, ground wires that are electrically connected o the contacts are also formed. Furthermore, if a plurality of ground wire layers is
required, the plugs that links with a previous ground wires are formed concurrently with the step of forming necessary plugs in the die section. Moreover, the next layer of ground wires is formed in the scribe lines when the next conductive layer is patterned inside the die section. The ground wires in the upper layer and the ground wires in the lower layer are electrically connected through the plugs.
The conductive structure on the wafer has several functions. When a plasma semiconductor process is carried out, the ground wires provide electrical paths for the flow of current so that uneven electrical charge distribution of the plasma can be equalized. In addition, the ground wire, the contact and the plug that links up the ground wires of different layers are electrically connected together with the semiconductor substrate so that the whole structure is effectively grounded. In other words, excess charges above the wafer can be channeled away through the semiconductor substrate.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5258328 (1993-11-01), Sunada et al.
patent: 5759919 (1998-06-01), Liu
patent: 6225207 (2001-05-01), Parikh
Powell William A.
United Microelectronics Corp.
Wu Charles C. H.
Wu & Chueng, LLP
LandOfFree
Wafer conductive structure for preventing plasma damage does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Wafer conductive structure for preventing plasma damage, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wafer conductive structure for preventing plasma damage will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2991979