Wafer coating method for flip chips

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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Details

C438S108000, C438S110000, C438S612000

Reexamination Certificate

active

06323062

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally for methods of providing underfill materials on flip chips. More particularly, the present invention relates to a method in which a wafer is provided with solder bumps and diced prior to the application of a polymeric underfill material.
BACKGROUND OF THE INVENTION
Flip chip technology, although several decades old in the ceramic module area, has recently been applied to organic substrates. Flip chip methodologies, first employed over 30 years ago, involve directly attaching Integrated Circuits (ICs) to circuit boards by means of a joint instead of a wire. This method is also called Direct Chip Attach (DCA). Several mainframe computer makers and other manufacturers of electronic components, have used this flip chip technology to produce very efficient, high-density modules. The direct attachment of the ICs to circuit boards eliminates the IC component package that can occupy up to 50 times more space than the IC chip itself.
Many companies have used flip chips exclusively on ceramic circuits that have a low Coefficient of Thermal Expansion (CTE). In these applications, the chip and circuit have a relatively close thermomechanical match. As a result, upon heating, the IC and the substrate upon which it is mounted undergo similar thermal expansions with the result being that physical stresses between the IC and the substrate are minimized or maintained within acceptable limits. However, when flip chip technology is applied to the more common and considerably lower cost organic printed circuit boards, a large thermal mismatch results. Typical organic printed circuit boards (PCBs) have a CTE of 15 to 25 parts per million per ° C. (ppm/° C.) compared to only 2-3 ppm/° C. for silicon ICs. The results are that excessive stress is generated during thermal cycling of flip chips that have been attached to PCBs. These forces can be great enough to destroy the joints that connect the chip to the circuit.
One common solution to the flip chip thermal mismatch problem has been known for some time. Specifically, a liquid polymerizable material, called an “underfill”, is flowed under the flip chip. Once the underfill has completely filled the small gap that exists between the bottom of the flip chip and the substrate, the material is hardened by polymerization. The hardened, polymerized underfill locks the flip chip and circuit board together so that there is little if any differential movement. As a result, the very rigid flip chip is mechanically coupled to the substrate by means of the underfill. Thus, the substrate expansion, at least at the interface, is restrained. This restraint causes the substrate adjacent to the flip chip to physically behave in a mainer that is similar to that of the flip chip. By controlling excessive stresses that would otherwise form in the joints between the chip and PCB, a reliable assembly can be fabricated.
While the use of underfill has solved the thermal mismatch problem for low cost flip chips on organic substrates, it has given rise to a series of significant manufacturing problems. First, the prepolymerized liquid underfill must be applied off-line as a secondary process with special equipment. Typically, the underfill is applied to one, two or three edges of the assembled flip chip and allowed to flow all the way under the mounted chip. Once the material has flowed to opposite edges and all air has been displaced from under the chip, additional underfill is dispensed to those outer edges to form a fillet so that that all four edges are symmetrical. The fillet increases reliability and is generally preferred even though it requires additional manufacturing time. Next the assembly is baked in an oven to polymerize and harden the underfill, again adding time to the process. This baking process can take several hours, although, new processes, such as microwave curing, may reduce the time substantially. However, the added equipment and its maintenance adds significantly to manufacturing costs. Thus, while the use of underfill helps to alleviate the thermal mismatch problem and provides a commercial solution, the electronic device manufacturing industry seeks more efficient manufacturing methods with lower associated costs. In fact, many in the industry believe that the present burden imposed by underfill processing may inhibit industry wide use of flip chip technology.
Recently, advances have been made which improve and streamline the underfill process. One method that has shown some commercial interest involves dispensing underfill before assembling the flip chip to the board. The method requires that the underfill permit solder joints to form. Soldering of flip chips to circuits is generally accomplished by applying flux to the solder bumps on the flip chip or to the circuit pads on the circuit. An underfill that is pre-dispensed before soldering should contain flux or have properties that facilitate solder joint formation. Since the pads on circuit often oxidize and since tin/lead solder bumps on flip chips are always oxidized, the flux must be designed to reduce these oxide coatings and facilitate solder joint formation. These so called, pre-dispensed underfills, have therefore been designed to include flux chemistry. While simplifying the flip chip process, they still require extra steps and cannot be run on a standard surface mount assembly line.
In spite of the numerous advantages provided by flip chip technology, a need still exists for flip chip methods which simplify the application of underfill. A need also exists for process methodologies which reduce the number of process steps required with underfill application.
SUMMARY OF THE INVENTION
The present invention relates to a method for applying underfill to flip chips prior to assembling such chips on printed circuit boards. The invention is characterized in that it simplifies the process of applying the underfill, permits conventional sawing methods to be used in singulating the wafer and provides underfill not only on the underside of each chip but along each edge of the chip as well.
More particularly, the present invention relates to a process which includes the steps of providing an expandable adhesive substrate having adhered thereto a wafer having solder bumps, cutting or sawing the wafer to define one or more individual integrated circuit chips, stretching the adhesive substrate in a manner which separates each individual integrated circuit from those adjacent to it, and providing an underfill material on the bumped surface and along each edge of each integrated circuit. The resulting underfill-coated chips can then be removed from the adhesive substrate and individually packaged for transport and storage until they are applied to a printed circuit.
Once positioned on a printed circuit board, the assembly is transported through a reflow oven or other means in which to heat the solder and polymerize the underfill, thereby effectively mounting the chips in place. The resulting chips are soldered into position on the printed circuit board, and include a complete underfill and surrounding polymeric fillet. Of course, if the underfill material is a prepolymerized, thermoplastic material, the heating step serves to melt the underfill, allowing it to flow and bond between the chip and the printed circuit board.


REFERENCES:
patent: 5128746 (1992-07-01), Pennisi
patent: 5492863 (1996-02-01), Higgins, III
patent: 5543585 (1996-08-01), Booth et al.
patent: 853 337 A (1998-07-01), None
patent: WO 98/02919 (1998-01-01), None
patent: WO99/04430 (1999-01-01), None
Patent Abstracts of Japan, vol. 014, No. 546 (E-1008), Dec. 4, 1990 and JP 02 234447 A (NEC Corp.) Sep. 17, 1990 abstract.
Patent Abstracts of Japan, vol. 015, No. 125 (E-1050), Mar. 1991 & JP 03 012942 A (Sharp Corp., Jan. 21, 1991 abstract.

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