Wafer burn-in and test system

Details Wafer burn-in and test system Wafer burn-in and test system

1992-09-30

1994-04-26

Karlsen, Ernest F.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

324158F, 437 8, G01R 3128, G01R 3102

Patent

active

053070100

ABSTRACT:
An interconnection system and method of testing and performing burn-in of semiconductor devices prior to separation from the semiconductor wafer on which the devices are formed includes forming interconnection layers of contacts and conductors over the devices and then testing and performing burn-in on the devices. Faulty devices are disconnected from the conductors prior to performing additional test and burn-in. The interconnections are removed prior to separating the device on the wafer, and prior to further possible tests and packaging.

REFERENCES:
patent: 4281449 (1981-08-01), Ports et al.
patent: 4356379 (1982-10-01), Graeme
patent: 4467400 (1984-08-01), Stopper
patent: 4611385 (1986-09-01), Forrest et al.
patent: 4628590 (1986-12-01), Udo et al.
patent: 4755750 (1988-07-01), Leuschnip
patent: 4801869 (1989-01-01), Sprogis
patent: 4956602 (1990-09-01), Parrish
patent: 4961053 (1990-10-01), Krug
patent: 5037771 (1991-08-01), Lipp
IBM Technical disclosure Bulletin vol. 32 No. 6B Nov. 1989, pp. 700-707, "Wafer Burn-in Isolation Circuit".

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