Wafer-bonding using solder and method of making the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead

Reexamination Certificate

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C257S785000, C257S786000, C257S772000

Reexamination Certificate

active

06870262

ABSTRACT:
A method is provided for forming a wafer stack. This may include providing a first wafer having a first plurality of metalized trenches on a surface of the first wafer. A second wafer may be provided having a second plurality of metalized trenches on a surface of the second wafer facing the first wafer. The first plurality of metalized trenches may be solder bonded to the second plurality of metalized trenches.

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patent: 5576415 (1996-11-01), Tanaka
patent: 5656553 (1997-08-01), Leas et al.
patent: 5825076 (1998-10-01), Kotvas et al.
patent: 6051866 (2000-04-01), Shaw et al.
patent: 6169162 (2001-01-01), Bush et al.
patent: 6303741 (2001-10-01), Tanaka
patent: 6445271 (2002-09-01), Johnson
patent: 6498557 (2002-12-01), Johnson
patent: 6667225 (2003-12-01), Hau-Riege et al.
patent: 20020057173 (2002-05-01), Johnson

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