Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor
Reexamination Certificate
2005-12-13
2005-12-13
Williams, Alexander Oscar (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
C257S777000, C257S686000, C257S723000, C257SE21519, C257SE21515, C257SE21505, C257S797000, C257S620000, C324S754090, C324S760020, C438S612000, C438S107000
Reexamination Certificate
active
06975016
ABSTRACT:
A three-dimensional (3-D) integrated chip system is provided with a first wafer including one or more integrated circuit (IC) devices; a second wafer including one or more integrated circuit (IC) devices; and a metal bonding layer deposited on opposing surfaces of the first and second wafers at designated locations to establish electrical connections between active IC devices on the first and second wafers and to provide metal bonding between the adjacent first and second wafers, when the first wafer is pressed against the second wafer using a flexible bladder press to account for height differences of the metal bonding layer across the opposing surfaces of the first and second wafers.
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Kellar Scot A.
Kim Sarah E.
List R. Scott
Intel Corporation
Williams Alexander Oscar
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